S+core

S+core
Designer Sunplus Technology
Bits 32/16-bit
Introduced 2005
Design RISC
Endianness Little

S+core is a hybrid 32/16-bit instruction set architecture designed by Sunplus Technology.

S+core architecture

The 32-bit microarchitecture features Advanced Microcontroller Bus Architecture (AMBA) support and includes SJTAG for In-circuit emulation. It is implemented on the Sunplus SPG290 system-on-a-chip (SoC).[1]

It is supported by the Linux kernel since version 2.6.32.[2]

Company information

Sunplus Technology is a fabless design company based in Taiwan. The company's chief executive is Sun Ching-jie.[3]

Before the SPG (S+core) the company designed the 8bit SPLB31A/GPLB31A and PLB20D2 based on the MOS Technology 8502 and 6502 microprocessors respectively. The Sunplus/ Generalplus SPLB31A/GPLB31A is an embedded chip that integrates LC display and I/O controllers alongside the 8502.

In 2007, HP released the HP 35s, a calculator that uses the SPLB31A/GPLB31A.[4]

George Chou was in charge of Design Methodology Service.[5]

S+core is Taiwan's first 32bit embedded processor design and has commercial success.[3][1]

Products featuring Sunplus integrated circuits

The Mattel HyperScan game console is powered by the SPG S+core

SPG (S+core)

SPLB31A/GPLB31A (8502 8-bit)

See also

References

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