Company | EDA products |
Agnisys, Inc. |
- IDesignSpec Register Management tool
- ISequenceSpec Portable Sequence Generator
- IVerifySpec Verification Management tool
- DVinsight Editor and Checker for SV, UVM
- ARV(Automatic Register Verification)
|
Aldec, Inc. |
- Active-HDL
- Riviera-PRO
- ALINT
- Spec-TRACER
|
Altera |
|
Altium |
- Altium Designer (Formerly Protel)
- PCB Design
- Circuit Simulation
- Altium Designer - PCB Design software, Schematic Capture and Circuit Simulation
- Altium Vault - Design Data Management Solution
- PDN Analyzer - Power Distribution and Network Analysis (A/C)
- CircuitStudio - easy-to-use PCB design tool
- CircuitMaker - free community-driven PCB design tool for makers
- SOLIDWORKS PCB Connector - OEM Product provides link from AD to you MCAD environment in SOLIDWORKS
- EDA Connect - Direct Link Between Altium Environment & Enterprise PLM
- P-CAD (Ceased. Former Accel EDA from Accel Technologies)
|
Ansys |
- Ansoft HFSS - High-Frequency Structure Simulation
- Apache Design, Inc. products:
- PowerArtist: RTL Design for Power Platform
- RedHawk: Full-chip Dynamic SoC Power Integrity Solution
- Totem: Analog and Mixed-Signal Power & Noise Platform
- Sentinel: Chip-Package-System Co-design/Co-analysis Solution
- PathFinder: Layout-based ESD Integrity Solution
|
Austemper Design Systems Inc |
- SafetyScope: Computes the FIT rates and diagnostic coverage metrics for permanent and transient faults
- Annealer: Safety synthesis tools for adding error correcting codes (ECC), error detection codes (EDC), block level duplication or triple instances or design.
- RadioScope: Safety synthesis tools for adding ECC or EDC to banks of flops, duplication of critical sections of the design, addition of illegal condition checks.
- KaleidoScope: Fault campaign tool capable of fault propagation and disposition of injected faults into detected, safe and undetected faults.
|
EMWorks |
HFWorks: High Frequency Electromagnetic Simulator
EMS: Low Frequency Electromagnetic Simulator |
Cadence Design Systems |
- System Development Suite with Verification Computing Platform, Virtual System Platform, Incisive Verification Platform, and Rapid Prototyping Platform
- C-to-Silicon
- Verification IP Catalog
- Design IP
- Chip Planning Solution
- Virtuoso - IC Artist
- Virtuoso - IC Layout
- Virtuoso - Layout Migrate
- Innovus - Digital IC design
- Encounter - Digital IC design
- Encounter - Conformal-LEC
- Encounter - Conformal Low Power
- Encounter - Conformal ECO Designer
- Encounter - Conformal Constraint Designer
- Encounter - RTL Compiler
- Encounter - RTL Compiler Physical
- Encounter - Test ATPG
- Encounter - Test Diagnostics
- Encounter - Design Implementation
- Encounter - QRC (Extraction & Checking)
- Encounter - Nanoroute
- Allegro - PC/MCM design
- Incisive - functional verification
- Design for Manufacturing
- SPECCTRA Autorouter
- OrCAD
- Denali Software products
- Spectra
- PureSpec
- MMAV
- Databahn
- Blueprint
- Sigrity products
- OptimizePI
- PowerDC
- XtractIM
- PowerSI
- Broadband SPICE
- SPEED2000
- Channel Designer
- XcitePI
- OrbitIO Planner
- Unified Package Designer (UPD) acquired from Synopsys
- Forte Design Systems products
|
CadSoft Computer |
|
EasyEDA |
- Schematic capture
- SPICE simulation
- PCB layout
|
DAFCA |
|
DEX 2020 |
|
Dolphin Integration |
- SLED - Schematic entry and netlisting
- SMASH - Mixed-signal, mixed-language modeling and simulation
- SCROOGE TLA - Mixed-signal power consumption estimation
- SoC GDS - Layout viewer and processor
- GDS Reticle - Test pattern frame generator
|
EasyLogix - Schindler & Schill GmbH |
- PCB-Investigator - Professional ECAD Workstation for PCB development
- GerberLogix - Free Gerber Viewer
- Online-Gerber-Viewer - Free Gerber Viewer (no installation required)
|
Eremex |
- TopoR - topological router for printed circuit boards laid out in any compatible systems that use the PCAD ASCII PCB, PADS ASCII PCB or DSN format
- SimOne - circuit simulation (the basic circuit analyses common to SPICE modeling systems + stability analysis)
- Delta Design - software tool for electronic design automation (EDA)
|
Ferrochip |
- Design Studio - Integrated Magnetics EDA Tool
|
gEDA |
- gschem: schematics editor
- pcb: PCB layout editor
- gerbv: Gerber file viewer
|
Ing.-Büro FRIEDRICH |
TARGET 3001! PCB Layout CAD Software
- Schematic editor
- Simulation PSpice compliant
- PCB design
- Front panel design
- SQL component database
- 3D model design, STEP Import, STEP Export
- PCB assembly price calculator
- Electra: High speed auto router
- COMPONIVERSE: A component exchange
- MID Design
|
Intellitech |
- Nebula Silicon Debugger - Interactive program which connects to Synopsys VCS and Cadence Design Systems NCSim for pre-silicon validation with cross-reference during connection to real silicon
|
Intercept Technology Inc |
- Pantheon - PCB, RF and Hybrid layout application with manufacture verification
- Mozaix - Schematic entry
- Indx - Library management
- Windows and Linux platforms
|
Invionics |
- Invio Custom EDA Tool Platform - Platform that allows IC developers to quickly build custom EDA tools in tcl or Python that parse, explore and manipulate Verilog, SystemVerilog and VHDL
|
JEDA Technologies |
- C/C++/SystemC Model Validation Tool Suite
- OCP Validation Suite
- TLM2.0 Validation Suite
|
Keysight Technologies EEsof EDA division |
- Platforms:
- Advanced Design System – high frequency and high speed design
- EMPro (formerly Antenna Modeling Design System) - 3D EM platform
- GoldenGate (supersedes RF Design Environment) - RFIC/RF mixed signal simulator (Xpedion acquisition)
- IC-CAP, Model Builder Program (MBP), Model Quality Assurance (MQA), Advanced Model Analysis (AMA) - Device modeling and validation (all but IC-CAP from Accelicon acquisition)
- Genesys - RF and microwave design (Eagleware-Elanix acquisition)
- SystemVue - Electronic system-level design (Eagleware-Elanix acquisition)
- EM solvers:
- Momentum – 3D planar, frequency domain, available with the ADS, Genesys, and GoldenGate platforms
- FEM Element – full 3D, frequency domain, available with the ADS and EMPro platforms
- FDTD – full 3D, time domain, available with the EMPro platform
|
KiCad (GPL) |
- eeschema - schematic capture
- PCBnew - PCB layout
- gerbview - Gerber viewer
|
Labcenter Electronics Ltd |
- Proteus Design Suite comprising modules for:
- Schematic Capture
- PCB Layout
- Mixed mode SPICE circuit simulation
- Micro-controller / Embedded Systems Simulation
|
Lauterbach |
|
Mentor Graphics |
- ADiT - Nanometer IC Design: fast SPICE
- Questa ADMS - Nanometer IC Design: mixed-signal simulator
- Board Station - PCB design software
- Calibre - physical verification
- Catapult Synthesis - ESL Design: high-level synthesis
- Catapult Library Builder - ESL Design: high-level synthesis
- Design Architect-IC - Nanometer IC Design
- Eldo - Nanometer IC Design: SPICE simulator
- Eldo RF - Nanometer IC Design: SPICE simulator
- Expedition - PCB design software
- IP - intellectual property (now part of embedded systems division)
- ModelSim LE - Nanometer IC Design: digital design and simulation; Linux-based simulator with Dataflow Window and Waveform Compare
- ModelSim PE - Nanometer IC Design: digital design and simulation; Windows-based simulator for VHDL, Verilog, or mixed-language simulation environments
- ModelSim SE - Nanometer IC Design: digital design and simulation; tri-lingual simulator with VHDL, Verilog, and SystemC
- Nimbic products[1]
- Nucleus EDGE - embedded systems development tools
- Inflexion - embedded systems application platform tools
- Nucleus OS - embedded systems OS
- Olympus-SoC - place and route
- PADS - PCB design software
- Platform Express Professional - ESL Design: platform-based design
- Platform Express Integrator's Kit - ESL Design: platform-based design
- Platform Express Client - ESL Design: platform-based design
- Questa - digital and mixed-signal simulation
- System Architect - ESL Design: system analysis
- SystemVision - Mechatronic Design: system analysis
- Tessent suite for test
- Tessent TestKompress
- Tessent BoundaryScan
- Tessent FastScan
- Tessent IJTAG
- Tessent LogicBIST
- Tessent Scan/ScanPro
- Vista - ESL Design: system debug
- Visual Elite - ESL Design: system integration
- Veloce/Veloce2 - high speed, high capacity SoC emulation
Through LogicVision Acquisition
- Dragonfly - Embedded test IP insertion tool for logic, memory and mixed-signal testing
- Silicon Insight - Interactive program that works with 3rd party testers for controlling and logging of data on the device for at-speed testing
- Yield Insight - Yield analysis program which looks at foundry and performance data to diagnose possible problems
|
VisualSim Architect (Mirabilis Design Inc) |
- Systems Specification and Design
- Hardware Design
- Software Validation
- Power Exploration
|
NanGate |
- Library Creator - Standard Cell Library Platform (IP creation and migration)
- Design Optimizer - Concurrent analysis and optimization of design, constraints and libraries
- Design Services - Standard Cell Library IP and Performance Extension IP
|
National Instruments |
|
POLYTEDA LLC |
|
Pulsonix |
- Pulsonix
- Pulsonix Schematic Capture
- Pulsonix Advanced PCB Layout
- Embedded Component Technology
- Flexi-rigid Circuit Design
- Chip-on-board Design
- Spice Mixed Mode A/D Simulation
- Constraints Driven Interactive High Speed Design
- Shape Based Autorouter
- Product Life Management(PLM) Interface
- Corporate Database Connection Interface
- 3D View
|
Silvaco International |
- Analog & mixed signal
- Utmost III - Device characterization and modeling
- Utmost IV - Device Characterization and SPICE Modeling
- Spayn - Statistical Parameter and Yield Analysis
- Gateway - Schematic Editor
- SmartSpice - Analog Circuit Simulator
- SmartSpiceRF - Frequency and time domain RF circuit simulator
- Harmony - Analog/Mixed-Signal Simulator
- Custom IC CAD
- Expert - Layout Editor
- Guardian - DRC/LVS/NET Physical Verification
- Hipex - Full-Chip Parasitic Extraction
- Interconnect modeling
- Quest - 3D RF Passive Device Modeling
- Clever - RC Extractor for Realistic 3D Structures
- Stellar - 3D Physics-Based RC Extractor for Large Cells
- Exact - Full Chip LPE Rule File Generator
- Digital CAD
- Silos - Verilog Simulator
- HyperFault - Mixed-Level Fault Simulator
- AccuCell - Cell Characterization and Modeling
- AccuCore - Block Characterization, Modeling and STA
- Catalyst AD - SPICE Netlist to Verilog Gates Converter
- Catalyst DA - Verilog Netlist to SPICE Netlist Converter
- Spider - Place and Route Design Flow
|
Solido Design Automation |
- Variation Designer - variation-aware design of custom integrated circuits
- Fast PVT—verify against process, voltage, and temperature corners
- Fast Monte Carlo—verification against 3-sigma process (statistical) variation
- High-Sigma Monte Carlo—verification against high-sigma process (statistical) variation
- Cell Optimizer—automated sizing of custom ICs
|
Synopsys, Inc. |
- Astro - place and route
- Cosmos Scope
- Custom Designer
- Design Compiler
- DFT Compiler
- DFTMAX compression
- Formality
- Hercules - physical verification
- HSIM
- HSPICE
- IC Compiler - place and route
- IC Validator
- NANOSIM
- Physical Compiler
- Proteus OPC
- Protocol Analyzer (debugging tool)
- PrimeTime - static timing analysis
- Saber
- Sentaurus TCAD
- Spice explorer
- Star-RCXT
- Synphony C Compiler - high-level synthesis
- TetraMAX ATPG
- VCS
- VIP
- XA
- Yield Explorer - yield management
|
Teklatech A/S |
- FloorDirector - Dynamic SoC backend Power Integrity Solution
- Dynamic SoC Power Integrity optimization
- Timing optimization
- Routability optimization for 16nm, 10nm and 7nm
|
Ucamco |
|
Upverter, Inc. |
- Schematic Capture
- PCB Layout
- System Design Tool
|
Xilinx |
|
Zuken, Inc. |
|