7 nanometer
Semiconductor manufacturing processes |
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Half-nodes |
In semiconductor manufacturing, the International Technology Roadmap for Semiconductors defines the 7 nanometer (7 nm) node as the technology node following the 10 nm node.
Single transistor 7 nm scale devices were first produced in the early 2000s – as of 2017 commercial production of 7 nm chips is at a development stage.
History
Technology demos
In July 2015, IBM announced that they had built the first functional transistors with 7 nm technology, using a silicon-germanium process.[1][2]
By early 2017, TSMC had produced 256Mbit SRAM cells at their 7nm process with a cell area of 0.027µm2 with reasonable risk production yields.[3]
Expected commercialisation and technologies
Although Intel has not yet divulged any certain plans to manufacturers or retailers, it has already stated that it would no longer use silicon at this node.[4] A possible replacement material for silicon would be indium gallium arsenide (InGaAs) or graphene.[5]
In April 2016, TSMC announced that 7 nm trial production would begin in the first half of 2017.[6] In March 2017, TSMC announced 7 nm risk production starting by June 2018.[7] TSMC's 7nm production plans, as of early 2017, are to use EUV or immersion lithography initially on this process node, and transition from risk to commercial volume manufacturing from Q2 2017 to Q2 2018. Also, their later generation 7nm production is planned to use EUV multiple patterning and to have an estimated transition from risk to volume manufacturing between 2018 and 2019.[8]
In September 2016, GlobalFoundries announced trial production in the second half of 2017 and risk production in early 2018, with test chips already running.[9]
In February 2017, Intel announced Fab 42 in Arizona will produce microprocessors using 7 nm manufacturing process.[10]
7 nm process nodes
The naming of process nodes by different major manufacturers (TSMC, Intel, Samsung, GloFo) is partially marketing driven and not directly related to any measurable distance on a chip - for example TSMC's 7nm node is similar in some key dimensions to Intel's 10nm node. Nevertheless, as of 2017, the technological race to the greatest density was still competitive between the main players, with TSMC, Samsung, and Intel all holding leading positions between the years 2016 and 2017 when measured by the smallest feature size on chip.[11]
ITRS Logic Device
Ground Rules |
Samsung
(proposed) |
TSMC
(proposed) |
GlobalFoundries
(proposed) | |
---|---|---|---|---|
Process name | 8/7nm | 7nm | 7nm | 7nm |
Transistor Gate Pitch (nm) | 42 | 54 | 54 | 56 |
Interconnect Pitch (nm) | 24 | 36 | 40 | 40 |
Lower numbers are better. Transistor gate pitch is also referred to as CPP (contacted poly pitch) and interconnect pitch is also referred to as MMP (minimum metal pitch). [12][13]
References
- ↑ IBM Research builds functional 7nm processor
- ↑ IBM Discloses Working Version of a Much Higher-Capacity Chip - NYTimes.com
- ↑ Merritt, Rick (8 Feb 2017), "TSMC, Samsung Diverge at 7nm", www.eetimes.com
- ↑ "ISSCC 2015: Intel 10 nm Last Silicon Node". Android Authority.
- ↑ Sebastian Anthony (February 23, 2015). "Intel forges ahead to 10nm, will move away from silicon at 7nm: To keep up with Moore's law, Intel is looking at new materials, 3D packaging.". arstechnica.com.
- ↑ WATCH OUT INTEL AND SAMSUNG: TSMC IS GEARING UP FOR 7NM PROCESSING WITH TRIAL PRODUCTION
- ↑ "TSMC Tips 7+, 12, 22nm Nodes | EE Times". EETimes. Retrieved 2017-03-17.
- ↑ Shilov, Anton (5 May 2017), "Samsung and TSMC Roadmaps: 8 and 6 nm Added, Looking at 22ULP and 12FFC", www.anandtech.com, p. 2
- ↑ "GLOBALFOUNDRIES to Deliver Industry’s Leading-Performance Offering of 7nm FinFET Technology" (Press release). September 15, 2016. Retrieved April 8, 2017.
- ↑ Intel Supports American Innovation with $7 Billion Investment in Next-Generation Semiconductor Factory in Arizona: Intel’s Fab 42 will Target Advanced 7 nm Technology and Create More Than 10,000 Jobs in Arizona
- ↑ Merrit, Rick (16 Jan 2017), "15 Views from a Silicon Summit", www.eetimes.com
- ↑ "International Technology Roadmap for Semiconductors 2.0 2015 Edition Executive Report" (PDF).
- ↑ "7 nm lithography process".
Preceded by 10 nm |
CMOS manufacturing processes | Succeeded by 5 nm |