Phase frequency detector

A phase frequency detector (PFD), in electronics, is a device which compares the phase of two input signals. It has two inputs which correspond to two different input signals, usually one from a voltage-controlled oscillator (VCO) and another from some external source. It has two outputs which instruct subsequent circuitry on how to adjust to lock onto the phase.

To form a Phase-locked loop (PLL) the PFD phase error output is fed to a loop filter which integrates the signal to smooth it. This smoothed signal is fed to a voltage-controlled oscillator which generates an output signal with a frequency that is proportional to the input voltage. The VCO output is also fed back to the PFD to form the PLL circuit.

The PFD is an improvement over the phase comparators of early PLLs in that it also provides a frequency error output as well as a phase error signal.

References

Devon Fernandez and Sanjeev Manandhar (8 December 2003). "Digital Phase Locked Loop" (PDF). Retrieved 2006-04-25.
Zilic, Zeljko (2001-08-17). "Phase- and Delay-Locked Loop Clock Control in Digital Systems". TechOnLine. Archived from the original on 2006-05-15. Retrieved 2006-04-25.
Mike Curtin and Paul O'Brien (July–August 1999). "Phase Locked Loops for High-Frequency Receivers and Transmitters-3". Analog Dialogue (Analog Devices). Retrieved 2006-04-25.

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