Parallel communication

Parallel versus serial communication.

In computer science, parallel communication is a method of conveying multiple binary digits (bits) simultaneously. It contrasts with serial communication, which conveys only a single bit at a time; this distinction is one way of characterizing a communications link.

The basic difference between a parallel and a serial communication channel is the number of electrical conductors used at the physical layer to convey bits. Parallel communication implies more than one such conductor. For example, an 8-bit parallel channel will convey eight bits (or a byte) simultaneously, whereas a serial channel would convey those same bits sequentially, one at a time. If both channels operated at the same clock speed, the parallel channel would be eight times faster. A parallel channel may have additional conductors for other signals, such as a clock signal to pace the flow of data, a signal to control the direction of data flow, and handshaking signals.

Parallel communication is and always has been widely used within integrated circuits, in peripheral buses, and in memory devices such as RAM. Computer system buses, on the other hand, have evolved over time: parallel communication was commonly used in earlier system buses, whereas serial communications are prevalent in modern computers.

Examples of parallel communication systems

• IBM System/360 Direct Control Feature (1964).^[1]:p.18 Standard System/360 had an eight-bit wide port. The process-control variant Model 44 had a 32-bit width.

• Computer peripheral buses: ISA, ATA, SCSI, PCI and Front side bus, and the once-ubiquitous IEEE-1284 / Centronics "printer port"

• Laboratory Instrumentation bus IEEE-488

• (see more examples at Computer bus)

Comparison with serial links

Before the development of high-speed serial technologies, the choice of parallel links over serial links was driven by these factors:

• Speed: Superficially, the speed of a parallel data link is equal to the number of bits sent at one time times the bit rate of each individual path; doubling the number of bits sent at once doubles the data rate. In practice, clock skew reduces the speed of every link to the slowest of all of the links.
• Cable length: Crosstalk creates interference between the parallel lines, and the effect worsens with the length of the communication link. This places an upper limit on the length of a parallel data connection that is usually shorter than a serial connection.
• Complexity: Parallel data links are easily implemented in hardware, making them a logical choice. Creating a parallel port in a computer system is relatively simple, requiring only a latch to copy data onto a data bus. In contrast, most serial communication must first be converted back into parallel form by a universal asynchronous receiver/transmitter (UART) before they may be directly connected to a data bus.

The decreasing cost and better performance of integrated circuits has led to serial links being used in favor of parallel links; for example, IEEE 1284 printer ports vs. USB, Parallel ATA vs. Serial ATA, and FireWire or Thunderbolt are now the most common connectors for transferring data from AV devices such as digital cameras or professional-grade scanners that used to require purchasing a SCSI HBA years ago.

One huge advantage of having fewer wires/pins in a serial cable is the significant reduction in the size, the complexity of the connectors, and the associated costs. Designers of devices such as smartphones benefit from the development of connectors/ports that are small, durable, and still provide adequate performance.

On the other hand, there has been a resurgence of parallel data links in RF communication. Rather than transmitting one bit at a time (as in Morse code and BPSK), well-known techniques such as PSM, PAM, and Multiple-input multiple-output communication send a few bits in parallel. (Each such group of bits is called a "symbol"). Such techniques can be extended to send an entire byte at once (256-QAM).

References

 This article incorporates public domain material from the General Services Administration document "Federal Standard 1037C" (in support of MIL-STD-188).

See also

• Data transmission
• Serial port
• Bit-level parallelism

Technical and de facto standards for wired computer buses General System bus Front-side bus Back-side bus Daisy chain Control bus Address bus Bus contention Network on a chip Plug and play List of bus bandwidths Standards SS-50 bus S-100 bus Unibus VAXBI MBus STD Bus SMBus Q-Bus Europe Card Bus ISA STEbus Zorro II Zorro III CAMAC FASTBUS LPC HP Precision Bus EISA VME VXI VXS NuBus TURBOchannel MCA SBus VLB PCI PXI HP GSC bus CoreConnect InfiniBand UPA PCI Extended (PCI-X) AGP PCI Express (PCIe) Direct Media Interface (DMI) RapidIO Intel QuickPath Interconnect HyperTransport Storage ST-506 ESDI SMD Parallel ATA (PATA) SSA DSSI HIPPI Serial ATA (SATA) eSATA eSATAp mSATA SCSI Parallel SCSI SAS Fibre Channel SATA Express M.2 Peripheral Apple Desktop Bus HIL MIDI Multibus RS-232 RS-422 RS-423 RS-485 DMX512-A IEEE-488 (GPIB) IEEE-1284 (parallel port) UNI/O ACCESS.bus 1-Wire D²B I²C SPI Parallel SCSI Profibus USB IEEE 1394 (FireWire) Camera Link External PCIe Thunderbolt Audio ADAT Lightpipe AES3 Intel HD Audio I²S MADI McASP S/PDIF TOSLINK Portable PC Card ExpressCard Embedded Multidrop bus AMBA Wishbone Interfaces are listed by their speed in the (roughly) ascending order, so the interface at the end of each section should be the fastest. Category