List of CPU architectures

The following is a list of notable CPU architectures.

All computers run using very low-level commands which do some very basic functions, such as reading data, writing data, jumping to addresses, and calculating basic arithmetic. (The complete list of commands that can be run by a CPU is known as that computer’s instruction set). Instruction sets are relatively small; most higher-order programming languages, such as C++, Ada, Fortran, or Visual Basic, must be compiled (or translated, or interpreted) into these low level commands in order for a program to run.

These low-level commands are run in a series of steps, which are synchronized with the computer’s clock. (One apt analogy would be an internal combustion engine. In an engine, the pistons, valves, and fuel systems must all run in a very synchronized manner, so likewise a computer runs – with precise timing dictating when instructions are fetched and executed, and when data is read and written. If an engine runs in a cycle: intake, compression, ignition, and exhaust; so does a computer's CPU: fetch, load, execute, write.)

CPU architects strive for designs that are compact and efficient, thus forcing many tradeoffs to be considered during design. A 32-bit architecture can move more data than a 16-bit architecture in each cycle (thereby making it faster), but the data bus is also twice as wide, which takes up more area on the limited space of a chip. Despite these challenges, continual advances in VLSI design have made it possible for computer processors to steadily grow exponentially more powerful over the past few decades.

Embedded CPU architectures

• ARM's
  • ARM architecture (32-bit)
  • ARM64 (64/32-bit)
• Atmel's AVR architecture
• Microchip's PIC architecture
• Texas Instruments's MSP430 architecture
• Intel's 8051 architecture
• Zilog's Z80 architecture
• Western Design Center's 65816 architecture
• Hitachi's SuperH architecture
• Axis Communications' ETRAX CRIS architecture
• Power Architecture (formerly PowerPC)
• EnSilica's eSi-RISC architecture
• Milkymist architecture
• Inmos' Transputer architectures

Microcomputer CPU architectures

• Pre-x86
• x86
  • Intel's IA-32 architecture, also called x86-32
  • x86-64 with AMD's AMD64 and Intel's Intel 64 version of it
• Motorola's 6800 and 68000 architectures
• MOS Technology's 6502 architecture
• Zilog's Z80 architecture
• Power Architecture (formerly POWER and PowerPC)
• ARM's
  • ARM^[1][2] (32-bit) (previously Advanced RISC Machines' ARM, originally Acorn's RISC Machine) and StrongARM/XScale architectures
  • ARM64 (64/32-bit)
• Renesas RX CPU architecture - Combination of RISC and CISC architectures

Workstation/Server CPU architectures

• DEC's Alpha architecture
• HP's PA-RISC architecture
• Power Architecture (formerly POWER and PowerPC)
• Intel's Itanium architecture (formerly IA-64)
• MIPS Computer Systems Inc.'s MIPS architecture
• Oracle's SPARC architecture

Mini/Mainframe CPU architectures

• Burroughs large systems architecture (1961–present) currently supported in the Unisys ClearPath/MCP series.
• IBM's System/360, System/370, ESA/390 and z/Architecture (1964–present)
• DEC's PDP-11 architecture, and its successor, the VAX architecture
• UNIVAC 1100/2200 series architecture (currently supported by Unisys ClearPath IX computers)
• MIL-STD-1750A - the U.S.'s military standard computer
• AP-101 - the space shuttle's computer

Mixed-core CPU architectures

• IBM's Cell architecture (a general purpose architecture that uses a POWER4 based core and 8 RISC based co-processors)
• CAS's Loongson 3
• Parallax Propeller, a 160 MIPS multicore microcontroller with eight 32-bit RISC cores.

Historically important CPUs

• EDSAC - the first practical stored-program computer
• Apollo Guidance Computer, used in the moon flights
• MIL-STD-1750 An early CPU, standardized for military and aerospace embedded systems.
• MIPS R4000 - the first microprocessor to use a 64-bit datapath
• Intel 4004 - the first microprocessor

See also

• Comparison of CPU architectures
• List of instruction sets

References