Socket FM2+
| Type | µPGA-ZIF |
|---|---|
| Chip form factors | PGA |
| Contacts | 906 |
|
This article is part of the CPU socket series | |
Socket FM2+ (FM2b) is a CPU socket used by AMD's desktop "Kaveri" APUs (Steamroller-based) and Godavari APUs (Steamroller-based) to connect to the motherboard. The FM2+ has a slightly different pin configuration to Socket FM2 with two additional pin sockets. Socket FM2+ APUs are not compatible with Socket FM2 motherboards due to the aforementioned additional pins. However, socket FM2 APUs such as "Richland" and "Trinity" are compatible with FM2+ socket.[1]
- ECC DIMMs are supported on Socket FP3 but not supported on the Socket FM2+ package. GDDR5 or HBM memory are not supported.[2]
- There are 3 PCI Express cores: one 2 x16 core and two 5 x8 cores, for a total of 64 lanes. There are 8 configurable ports, which can be divided into 2 groups:
- Gfx-group: contains 2 x8 ports. Each port can be limited to lower link widths for applications that require fewer lanes. Additionally, the two ports can be combined to create a single x16 link.
- GPP-group: contains 1 x4 UMI and 5 General Purpose Ports (GPP).
All PCIe links are capable of supporting PCIe 2.x data rates. In addition, the Gfx link is capable of supporting PCIe 3.x data rate.[2]
For available chipsets consult Fusion controller hubs (FCH).
Its mobile counterpart is Socket FP3 (BGA-???).
Feature overview
| Brand | Brazos (low power) | Llano | Trinity | Richland | Kabini & Temash (low power) | Kaveri | Beema & Mullins (low power) | Carrizo | Carrizo-L (low power) |
|---|---|---|---|---|---|---|---|---|---|
| Released | Jan 2011 | Aug 2011 | Oct 2012 | 2013 | May 2013 | Jan 2014 | Q2 2014 | 2015 | 2015 |
| Fab (nm) | TSMC 40 nm | GlobalFoundries 32 nm SOI | 28 | 28 | 28 | 28 | 28 | ||
| APU Socket | FT1 | FM1 FS1 | FM2 FS1+ FP2 | AM1 FT3 | FM2+ FP3 | FT3b | TBA | TBA | |
| CPU cores | Bobcat | AMD 10h | Piledriver | Jaguar | Steamroller | Puma | Excavator | Puma+[3] | |
| 3D engine1 | 80:8:4 | 400:20:8 | 384:24:6 | 384:24:6 | 128:8:4 | 512:32:8 | 128:8:4 | TBA | TBA |
| TeraScale 2 (VLIW5) | TeraScale 3 (VLIW4) | Graphics Core Next (Mantle, HSA) | |||||||
| IOMMUv1 | IOMMUv2 | IOMMUv1[4] | TBA | TBA | |||||
| Unified Video Decoder | UVD 3 | UVD 4 | UVD 4.2 | TBA | TBA | ||||
| Video Codec Engine | N/A | VCE 1.0 | VCE 2.0 | TBA | TBA | ||||
| TrueAudio | N/A | Yes[5] | N/A[4] | TBA | TBA | ||||
| Max. № of displays2 | 2 | 2–3 | 2–4 | 2 | 2–4 | 2 | TBA | TBA | |
| Direct Rendering Manager/ Mesa 3D driver[6][7] |
Yes[7] | WiP[8] | WiP[9] | ||||||
- 1 Unified shaders : Texture mapping units : Render output units
- 2 To feed more than two displays, the additional panels must have native DisplayPort support.[10] Alternatively active DisplayPort-to-DVI/HDMI/VGA adapters can be employed
External links
- ↑ http://www.tomshardware.com/news/Kaveri-AMD-FM2-FM2b-Socket,22949.html
- ↑ 2.0 2.1 "49125_15h_Models_30h-3Fh_BKDG" (pdf). AMD.
- ↑ "AMD Mobile “Carrizo” Family of APUs Designed to Deliver Significant Leap in Performance, Energy Efficiency in 2015" (Press release). 2014-11-20. Retrieved 2015-02-16.
- ↑ 4.0 4.1 Thomas De Maesschalck (2013-11-14). "AMD teases Mullins and Beema tablet/convertibles APU". Retrieved 2015-02-24.
- ↑ "A technical look at AMD’s Kaveri architecture". Semi Accurate. Retrieved 6 July 2014.
- ↑ Airlie, David (2009-11-26). "DisplayPort supported by KMS driver mainlined into Linux kernel 2.6.33". Retrieved 2014-07-02.
- ↑ 7.0 7.1 "Radeon feature matrix". freedesktop.org. Retrieved 2015-02-13.
- ↑ "AMDKFD Driver Does More Prepping For Carrizo / VI APUs". 2015-01-13. Retrieved 2015-01-13.
- ↑ "AMDKFD Driver Does More Prepping For Carrizo / VI APUs". 2015-01-13. Retrieved 2015-01-13.
- ↑ "How do I connect three or More Monitors to an AMD Radeon™ HD 5000, HD 6000, and HD 7000 Series Graphics Card?". AMD. Retrieved 2014-12-08.
| ||||||||||||||||||||||||||||||||||||||