Serial Port Memory Technology

The SPMT Consortium is a coalition of companies involved in designing and manufacturing mobile devices, integrated circuits, and semiconductor IP.[1] The organization developed the SPMT specification, which is a SerDes memory interface primarily for commodity DRAM and mobile markets. [2] The specification is ideal for data intensive, media-rich functionality like video, GPS, internet access, email, multimedia, and music.[1][3]

History

The SPMT Consortium was founded in 2009 by ARM Holdings, Hynix Semiconductor, Inc., LG Electronics, Samsung Electronics Co., Ltd. and Silicon Image, Inc. The Consortium is managed by SPMT, LLC, the entity responsible for licensing the SPMT memory interface specification.[4] SPMT is a memory specification for dynamic random access memory (DRAM) that is based on SerDes rather than a standard parallel interface.[1]

Technology summary

SPMT Technology alt text
SPMT Functional Blocks
  1. 20 signaling pins for 6 GB/s performance
  2. Simultaneous Read/Write
  3. Low energy per bit – (4–5 pJ/bit effective)
  4. Self-clocking
  5. Low EMI
  6. High noise rejection
  7. Standard DRAM commands
  8. Burst lengths of 16, 32, and 64 bytes
  9. Low voltage differential signaling

Members

The SPMT Consortium is divided into three levels of membership: Promoters (Founders), Contributors, and Members.

Timeline of events

See also

External links

References

  1. 1.0 1.1 1.2 SPMT Factsheet
  2. Press Release. "Serial Port Memory Technology Consortium Releases New Technology Specification." October 1, 2009.
  3. By Paul Tailor, The Inquirer. "Koreans spearhead Serial DRAM initiative." October 7, 2009.
  4. ECN Magazine. "SPMT Consortium Releases New Specification." October 2, 2009.