Saraju Mohanty

Saraju Mohanty

Saraju Mohanty in 2012
Residence Denton, Texas, USA
Nationality United States USA
Alma mater University of South Florida
Indian Institute of Science
Orissa University of Agriculture and Technology
Occupation Professor, author, scientist, engineer
Computer engineer
Faculty University of North Texas
Honors Chair, TCVLSI, IEEE-CS

Saraju Mohanty is a faculty member and the director of the NanoSystem Design Laboratory (NSDL) at the Department of Computer Science and Engineering (CSE), the University of North Texas (UNT) in Denton, Texas. Prof. Mohanty is a well-known researcher in the area of "Low-Power High-Performance Nanoelectronics" and hardware-assisted Digital watermarking. He has made significant research contributions to hardware-assisted Digital watermarking, Analogue electronics and Mixed-signal integrated circuit Computer-aided design (CAD) or Electronic design automation (EDA), and nanoelectronic technology based High-level synthesis (HLS). He is the Chair of Technical Committee on Very Large Scale Integration (TCVLSI), IEEE Computer Society (IEEE-CS) from September 2014. He is a senior member of both IEEE and ACM.


Background

Saraju Mohanty is a faculty member and the director of the NanoSystem Design Laboratory (NSDL)[1] at the Department of Computer Science and Engineering (CSE), the University of North Texas (UNT) in Denton, Texas. [2] He earned a Ph.D. in Computer engineering from the University of South Florida (USF) in 2003. He received a Master's degree in Systems Science and Automation (SSA) from the Indian Institute of Science (IISc), Bangalore, India in 1999. He received his Bachelor's degree (with Honors) in Electrical Engineering (EE) from the College of Engineering and Technology, Bhubaneswar, Orissa University of Agriculture and Technology (OUAT), Bhubaneswar, India in 1995. Dr. Mohanty is a well-known researcher in the area of "Low-Power High-Performance Nanoelectronics". [3]

Contributions to Digital watermarking

Saraju Mohanty is a pioneer in hardware-assisted Digital watermarking for real-time copy protection and digital rights management (DRM). He has invented the concept of Secure Digital Camera (SDC) for the real-time Digital rights management (DRM) at the source end of the multimedia content. [4] [5] [6] The SDC has quite diverse applications where still or video digital cameras are needed, such as secure Digital Video Broadcasting, secure Video Surveillance, electronic passport, and identity card processing. The secure digital camera (SDC) has been well-adopted by various researchers worldwide. In the process it has led to diverse implementations in various different platforms by many researchers worldwide. [7] [8] [9] Dr. Mohanty is the designer of earliest and unique energy-efficient digital watermarking chips. An earliest watermarking chip designed by him can perform invisible digital watermarking at the spatial domain and has capability of both robust and fragile watermarking depending on choice of the users. [10] A unique digital watermarking chip designed by Saraju Mohanty that can perform both visible watermarking and invisible watermarking is the lowest power consuming watermarking chip available at present. [11]

Contributions to Analogue electronics and Mixed-signal integrated circuit

Saraju Mohanty has introduced several novel approaches for ultra-fast design space exploration and optimization of nanoelectronic integrated circuits which can result in energy-efficient, robust, and nanoscale variation-tolerant Analogue electronics circuit as well as Mixed-signal integrated circuit. The key feature of these ultra-fast design flows is the need for only two manual layout (or physical design) iterations which saves significant design effort. These ultra-fast design flows rely on accurate metamodels of the analog and mixed-signal circuit components. His research significantly advances the state-of-the art in Design for Excellence (DfX) or Design for X, such as Design for Variability (DfV) and Design for Cost (DfC). [12] The metamodel-assisted ultra-fast design optimization flows can perform layout optimization of the components of analog/mixed-signal System on a chip (AMS-SoC) with very minimal design effort. This due to the 1,000X speedup caused by such techniques. As a specific example, a nanoelectronics technology based phase-locked loop (PLL) which needs several days of design cycle just for analog simulation with full-blown parasitics can be optimally designed in substantially shorter times (less than one day). [13] [14] The ultra-fast and accurate methodologies can lead to robust and low-cost consumer electronics such as smart mobile phones making them cheaper and available to larger segments of the population.

Contributions to High-level synthesis

Saraju Mohanty is one of the key contributors to nanoscale CMOS or nanoelectronic technology based High-level synthesis (HLS) or architecture-level synthesis. [15] [16] [17] His nanoelectronic-based High-level synthesis techniques address the issue of process variations, the primary issue of nanoelectronic technology, during the high-level synthesis itself before the digital design moves to the detailed and lower levels of design abstractions, such as logic-level or transistor-level. [18] This is a significant effort saver for the digital design engineers as the digital design is statistically optimized at the higher-level of abstraction. His HLS techniques produce Register-transfer level descriptions which not only meet traditional specifications, but are also robust against nanoscale process-variations. His HLS techniques are also the first ones to address transient power dissipation or power fluctuation during high-level synthesis, thus distinguishing power-aware design and battery-aware design at the higher levels of design abstractions. This is a very important contributions for digital circuits targeted for portable AMS-SoC.

Patents

Saraju Mohanty is an inventor of 2 US patents which has wider application in Digital watermarking and Digital rights management (DRM):

Books

Saraju Mohanty has authored/co-authored 3 books which are widely used as text/reference:


References

  1. ↑ http://nsdl.cse.unt.edu/
  2. ↑ http://www.cse.unt.edu/site/node/91
  3. ↑ http://www.cse.unt.edu/~smohanty/Research.html
  4. ↑ Secure digital camera#Secure digital camera
  5. ↑ Saraju Mohanty, “A Secure Digital Camera Architecture for Integrated Real-Time Digital Rights Management”, Elsevier Journal of Systems Architecture, Vol. 55, Issues 10-12, Oct-Dec 2009, pp. 468-480.
  6. ↑ S. P. Mohanty, O. B. Adamo, and E. Kougianos, "VLSI Architecture of an Invisible Watermarking Unit for a Biometric-Based Security System in a Digital Camera", in Proceedings of the 25th IEEE International Conference on Consumer Electronics, pp. 485-486, 2007.
  7. ↑ Thomas Winkler, Adam Erdelyi, and Bernhard Rinner, "TrustEYE M4: Protecting the Sensor--not the Camera", in Proceedings of the International Conference on Advanced Video and Signal Based Surveillance, 2014.
  8. ↑ S. D. Roy, Xin Li, Y. Shoshan, A. Fish, and O. Yadid-Pecht, "Hardware Implementation of a Digital Watermarking System for Video Authentication", IEEE Transactions on Circuits and Systems for Video Technology, Vol. 23, Issue 2, 2013, pp. 289-301.
  9. ↑ C. -T. Yen, T. -C. Wu, M. -H. Guo, C. -K. Yang, and H. -C. Chao, "Digital product transaction mechanism for electronic auction environment", IET Information Security, Vol. 4, Issue 4, 2010, pp. 248–257.
  10. ↑ S. P. Mohanty, N. Ranganathan, and R. K. Namballa, "VLSI Implementation of Invisible Digital Watermarking Algorithms Towards the Development of a Secure JPEG Encoder", in Proceedings of the IEEE Workshop on Signal Processing System, pp. 183-188, 2003.
  11. ↑ S. P. Mohanty, N. Ranganathan, and K. Balakrishnan, "Design of a Low Power Image Watermarking Encoder using Dual Voltage and Frequency", in Proceedings of the 18th IEEE International Conference on VLSI Design, pp. 153-158, 2005.
  12. ↑ DFX for Nanoelectronic Embedded Systems, Keynote Address at First IEEE Sponsored International Conference on Control, Automation, Robotics and Embedded System, CARE-2013, http://care.iiitdmj.ac.in/Keynote_Speakers.html.
  13. ↑ S. P. Mohanty and E. Kougianos, “Polynomial Metamodel Based Fast Optimization of Nano-CMOS Oscillator Circuits”, Analog Integrated Circuits and Signal Processing Journal, Vol. 79, Issue 3, June 2014, pp. 437-453.
  14. ↑ S. P. Mohanty and E. Kougianos, “Incorporating Manufacturing Process Variation Awareness in Fast Design Optimization of Nanoscale CMOS VCOs”, IEEE Transactions on Semiconductor Manufacturing, Vol. 27, Issue 1, February 2014, pp. 22--31.
  15. ↑ Saraju Mohanty and Elias Kougianos, "Simultaneous Power Fluctuation and Average Power Minimization during Nano-CMOS Behavioral Synthesis", in Proceedings of the 20th International Conference on VLSI Design, pp. 577-582, 2007.
  16. ↑ S. P. Mohanty, M. Gomathisankaran, and E. Kougianos, “Variability-Aware Architecture Level Optimization Techniques for Robust Nanoscale Chip Design”, Elsevier Computers and Electrical Engineering Journal, Vol. 40, Issue 1, January 2014, pp. 168--193.
  17. ↑ Y. Chen, Y. Wang, A. Takach, Y. Xie. "Parametric Yield Driven Resource Binding in High-Level Synthesis with Multi-Vth Vdd Library and Device Sizing", Journal of Electrical and Computer Engineering, Volume 2012, Article ID 105250, 14 pages, 2012.
  18. ↑ "Unified Challenges in Nano-CMOS High-Level Synthesis", Invited Talk, 22nd IEEE International Conference on VLSI Design, 2009.
  19. ↑ Apparatus and Method for Transmitting Secure and/or Copyrighted Digital Video Broadcasting Data Over Internet Protocol Network, US Patent Number: 8423778, Issued on: 16th Apr 2013 http://assignment.uspto.gov/#/assignment?id=22252-43&q=patAssignorName%3A(MOHANTY%2C%20AND%20SARAJU%20AND%20P.)
  20. ↑ Methods and Devices for Enrollment and Verification of Biometric Information in Identification Documents, US Patent Number: 8058972, Issued on: 15th Nov 2011 http://assignment.uspto.gov/#/assignment?id=21372-691&q=patAssignorName%3A(MOHANTY%2C%20AND%20SARAJU%20AND%20P.)
  21. ↑ http://www.mhprofessional.com/product.php?isbn=0071825711
  22. ↑ http://www.springer.com/engineering/circuits+%26+systems/book/978-1-4614-08178
  23. ↑ http://www.springer.com/engineering/circuits+%26+systems/book/978-0-387-76473-3