Puma (microarchitecture)
This article is about the microarchitecture. For the 2008 mobile platform, see AMD mobile platform#Puma platform (2008).
Produced | From mid-2014 to present |
---|---|
Common manufacturer(s) | |
Max. CPU clock rate | 1.35 GHz to 2.4 GHz |
Min. feature size | 28 nm |
Instruction set | AMD64 |
Cores | 2-4 |
L1 cache | 64 KB per core[1] |
L2 cache | 1 MB to 2 MB shared |
Socket(s) |
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Predecessor | Jaguar |
GPU | Radeon Rx: 128 cores, 300-800 Mhz |
Core name(s) |
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Brand name(s) |
Puma is a low-power SoC microarchitecture by AMD. It succeeds Jaguar, targets the same market and belongs to the same AMD architecture family 16h. The Beema line of Jaguars processors are aimed at low-power notebooks, and Mullins are targeting the tablet sector.
Design
The Puma cores use the same microarchitecture as Jaguar, and inherits the design:
- Out-of-order execution and Speculative execution, up to 4 CPU cores
- Puma does not feature clustered multi-thread (CMT), meaning that there are no "modules"
- Two-way integer execution
- Two-way 128-bit wide floating-point and packed integer execution
- Integer hardware divider
- Puma does not feature Heterogeneous System Architecture or zero-copy[2]
- 32 KiB instruction + 32 KiB data L1 cache per core
- 1-2 MiB unified L2 cache shared by two or four cores
- Integrated single channel memory controller supporting 64bit DDR3L
- 3.1 mm2 area per core
- as a SoC (not just an APU) it integrates Fusion controller hub with following components: ??? MISSING ???
Instruction set support
Like Jaguar, the Puma core has support for the following instruction sets and instructions: MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, BMI1, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM (POPCNT/LZCNT), and AMD-V.[1]
Features and ASICs
Brand | Brazos (low power) | Llano | Trinity | Richland | Kabini & Temash (low power) | Kaveri | Beema & Mullins (low power) | Carrizo | Carrizo-L (low power) |
---|---|---|---|---|---|---|---|---|---|
Released | Jan 2011 | Aug 2011 | Oct 2012 | 2013 | May 2013 | Jan 2014 | Q2 2014 | 2015 | 2015 |
Fab (nm) | TSMC 40 nm | GlobalFoundries 32 nm SOI | 28 | 28 | 28 | 28 | 28 | ||
APU Socket | FT1 | FM1 FS1 | FM2 FS1+ FP2 | AM1 FT3 | FM2+ FP3 | FT3b | TBA | TBA | |
CPU cores | Bobcat | AMD 10h | Piledriver | Jaguar | Steamroller | Puma | Excavator | Puma+[3] | |
3D engine1 | 80:8:4 | 400:20:8 | 384:24:6 | 384:24:6 | 128:8:4 | 512:32:8 | 128:8:4 | TBA | TBA |
TeraScale 2 (VLIW5) | TeraScale 3 (VLIW4) | Graphics Core Next (Mantle, HSA) | |||||||
IOMMUv1 | IOMMUv2 | IOMMUv1[4] | TBA | TBA | |||||
Unified Video Decoder | UVD 3 | UVD 4 | UVD 4.2 | TBA | TBA | ||||
Video Codec Engine | N/A | VCE 1.0 | VCE 2.0 | TBA | TBA | ||||
TrueAudio | N/A | Yes[5] | N/A[4] | TBA | TBA | ||||
Max. № of displays2 | 2 | 2–3 | 2–4 | 2 | 2–4 | 2 | TBA | TBA | |
Direct Rendering Manager/ Mesa 3D driver[6][7] |
Yes[7] | WiP[8] | WiP[9] |
- 1 Unified shaders : Texture mapping units : Render output units
- 2 To feed more than two displays, the additional panels must have native DisplayPort support.[10] Alternatively active DisplayPort-to-DVI/HDMI/VGA adapters can be employed
Improvements over Jaguar
- 19% CPU core leakage reduction at 1.2V[11]
- 38% GPU leakage reduction
- 500 mW reduction in memory controller power
- 200 mW reduction in display interface power
- Chassis temperature aware turbo boost[12]
- Selective boosting according to application needs (intelligent boost)
- Support for ARM TrustZone via integrated Cortex-A5 processor
- Support for DDR3L-1866 memory[13]
Processors
See also: List of AMD Accelerated Processing Unit microprocessors and List of AMD mobile microprocessors
Desktop/Mobile (Beema)
Family | Model | Socket | CPU | GPU | TDP | Memory | |||||
---|---|---|---|---|---|---|---|---|---|---|---|
Cores | Frequency | Max. Turbo | L2 Cache | Model | Config. | Max. Freq. | |||||
A8 | 6410 | Socket FT3b | 4 | 2.0 GHz | 2.4 GHz | 2 MB | Radeon R5 | 128:?:? | 800 MHz | 15 W | DDR3L-1866 |
A6 | 6310 | 1.8 GHz | Radeon R4 | 800 MHz | |||||||
A4 | 6250J | 2.0 GHz | N/A | Radeon R3 | 600 MHz | 25 W | DDR3L-1600 | ||||
A4 | 6210 | 1.8 GHz | Radeon R3 | 600 MHz | 15 W | ||||||
E2 | 6110 | 1.5 GHz | Radeon R2 | 500 MHz | |||||||
E1 | 6010 | 2 | 1.35 GHz | 1 MB | 350 MHz | 10 W | DDR3L-1333 |
Tablet (Mullins)
Family | Model | CPU | GPU | Power | Memory | ||||||
---|---|---|---|---|---|---|---|---|---|---|---|
Cores | Frequency | Max. Turbo | L2 Cache | Model | Config. | Max. Freq. | TDP | SDP | |||
A10 Micro | 6700T | 4 | 1.2 GHz | 2.2 GHz | 2 MB | Radeon R6 | 128:?:? | 500 MHz | 4.5 W | 2.8 W | DDR3L-1333 |
A6 Micro | 6500T | 1.8 GHz | Radeon R4 | 401 MHz | |||||||
A4 Micro | 6400T | 1.0 GHz | 1.6 GHz | Radeon R3 | 350 MHz | ||||||
E1 Micro | 6200T | 2 | 1.4 GHz | 1 MB | Radeon R2 | 300 MHz | 3.95 W | DDR3L-1066 |
References
- ↑ 1.0 1.1 "Software Optimization Guide for Family 16h Processors". AMD. Retrieved August 3, 2013.
- ↑ "AMD launches new Beema, Mullins SoCs". ExtremeTech. 2014-04-29. Retrieved 2014-05-02.
- ↑ "AMD Mobile “Carrizo” Family of APUs Designed to Deliver Significant Leap in Performance, Energy Efficiency in 2015" (Press release). 2014-11-20. Retrieved 2015-02-16.
- ↑ 4.0 4.1 Thomas De Maesschalck (2013-11-14). "AMD teases Mullins and Beema tablet/convertibles APU". Retrieved 2015-02-24.
- ↑ "A technical look at AMD’s Kaveri architecture". Semi Accurate. Retrieved 6 July 2014.
- ↑ Airlie, David (2009-11-26). "DisplayPort supported by KMS driver mainlined into Linux kernel 2.6.33". Retrieved 2014-07-02.
- ↑ 7.0 7.1 "Radeon feature matrix". freedesktop.org. Retrieved 2015-02-13.
- ↑ "AMDKFD Driver Does More Prepping For Carrizo / VI APUs". 2015-01-13. Retrieved 2015-01-13.
- ↑ "AMDKFD Driver Does More Prepping For Carrizo / VI APUs". 2015-01-13. Retrieved 2015-01-13.
- ↑ "How do I connect three or More Monitors to an AMD Radeon™ HD 5000, HD 6000, and HD 7000 Series Graphics Card?". AMD. Retrieved 2014-12-08.
- ↑ Shimpi, Anand. "AMD Beema/Mullins Architecture & Performance Preview". AnandTech. Retrieved 29 April 2014.
- ↑ Shimpi, Anand. "New Turbo Boost, The Lineup and Trustzone". AnandTech. Retrieved 29 April 2014.
- ↑ Woligroski, Don. "Meet The Mullins And Beema Tablet APUs". Toms Hardware. Retrieved 29 April 2014.
External links
- Software Optimization Guide for Family 16h Processors
- 2014 AMD Low-Power Mobile APUs
- Jaguar presentation (video) at ISSCC 2013
- Discussion initiated on RWT forums by Jeff Rupley, Chief Architect of the Jaguar core
- BKDG for Family 16h Models 00h-0Fh Processors
- Revision Guide for Family 16h Models 00h-0Fh Processors
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