Logarithmic resistor ladder

A logarithmic resistor ladder is an electronic circuit composed of a series of resistors and switches, designed to create an attenuation from an input to an output signal, where the logarithm of the attenuation ratio is proportional to a digital code word that represents the state of the switches.

The logarithmic behavior of the circuit is its main differentiator in comparison with digital-to-analog converters in general, and traditional R-2R Ladder networks specifically. Logarithmic attenuation is desired in situations where a large dynamic range needs to be handled. The circuit described in this article is applied in audio devices, since human perception of sound level is properly expressed on a logarithmic scale.

Logarithmic input/output behavior

As in digital-to-analog converters, a binary word is applied to the ladder network, whose N bits are treated to represent an integer value according the relation:

\mathrm{CodeValue} = \sum_{i=1}^N s_i \cdot 2^{i-1} where s_i represents a value 0 or 1 depending on the state of the ith switch.

For a conventional DAC or R-2R network, the output signal value (its voltage) would be:

V_{out} = a \cdot (\mathrm{CodeValue} + b ) \cdot V_{in} where a and b are design constants and where V_{in} typically is a constant reference voltage.

(DA-converters that are designed to handle a variable input voltage are termed multiplying DAC.[1])

In contrast, the logarithmic ladder network discussed in this article creates a behavior as:

\log (V_{out} / V_{in}) = a \cdot (\mathrm{CodeValue} + b ) where V_{in} is a variable input signal.

Circuit implementation

Schematic diagram

This example circuit is composed of 4 stages, numbered 1 to 4, and an additional leading Rsource and trailing Rload. Each stage i, has a designed input-to-output voltage attenuation ratioi as:

Ratio_i = \text{if}\; sw_i \;\text{then}\; \alpha^{2^{i-1}} \;\text{else}\; 1

For logarithmic scaled attenuators, it is common practice to express their attenuation in decibels:

dB(Ratio_i) = 20 \log_{10} \alpha^{2^{i-1}} = 2^{i-1} \cdot 20 \cdot \log_{10} \alpha for i = 1 .. N and sw_i = 1

This reveals a basic property: dB(Ratio_{i+1}) = 2 \cdot dB(Ratio_i)

To show that this Ratio_i satisfies the overall intention:

\log (V_{out}/V_{in}) = \log (\prod_{i=1}^N Ratio_i) = \sum_{i=1}^N \log (Ratio_i) = a \cdot (CodeValue + b )
for b = 0 and a = \log(\alpha)

The different stages 1 .. N should function independently of each other, as to obtain 2N different states with a composable behavior. To achieve an attenuation of each stage that is independent of its surrounding stages, either one of two design choices is to be implemented: constant input resistance or constant output resistance.

Constant input resistance

The input resistance of any stage shall be independent of its on/off switch position, and must be equal to Rload.

This leads to:

\begin{cases} R_{i,parr} = (R_{i,b} \cdot R_{load}) / (R_{i,b} + R_{load}) \\ R_{i,a} + R_{i,parr} = R_{load} \\ R_{i,parr} / (R_{i,a} + R_{i,parr}) = Ratio_i \end{cases}

With these equations, all resistor values of the circuit diagram follow easily after choosing values for N, \alpha and Rload. (The value of Rsource does not influence the logarithmic behavior)

Constant output resistance

The output resistance of any stage shall be independent of its on/off switch position, and must be equal to Rsource.

This leads to:

\begin{cases} R_{i,ser} = R_{i,a} + R_{source} \\ R_{i,ser} \cdot R_{i,b} / (R_{i,ser} + R_{i,b}) = R_{source} \\ R_{i,b} / (R_{i,ser} + R_{i,b}) = Ratio_i \end{cases}

Again, all resistor values of the circuit diagram follow easily after choosing values for N, \alpha and Rsource. (The value of Rload does not influence the logarithmic behavior)

Circuit variations

Background

R-2R ladder networks used for Digital-to-Analog conversion are rather old. A historic description is in a patent[2] filed in 1955.

Multiplying DA-converters with logarithmic behavior were not known for a long time after that. An initial approach was to map the logarithmic code to a much longer code word, which could be applied to the classical (linear) R-2R based DA-converter. Lengthening the codeword is needed in that approach to achieve sufficient dynamic range. This approach was implemented in a device from Analog Devices inc.,[3] protected through a 1981 patent filing.[4]

See also

References

  1. ↑ "Multiplying DACs, flexible building blocks" (PDF). Analog Devices inc. 2010. Retrieved 29 March 2012.
  2. ↑ US patent 3108266, Gordon, B. M., "Signal Conversion Apparatus", issued 22 October 1963
  3. ↑ LOGDAC: CMOS Logarithmic D/A Converter, "Analog Devices Inc. AD7118"
  4. ↑ US patent 4521764, Burton, David P., "Signal-controllable attenuator employing a digital-to-analog converter", issued 4 June 1985

External links