Fault grading

Fault grading is a procedure that rates testability by relating the number of fabrication defects that can in fact be detected with a test vector set under consideration to the total number of conceivable faults.

It is used for refining both the test circuitry and the test patterns iteratively, until a satisfactory fault coverage is obtained.^[1]

See also

• Automatic test pattern generation
• Design for Test

References

1. ↑ Kaeslin, Hubert, Digital Integrated Circuit Design: From VLSI Architectures to CMOS Fabrication, Cambridge University Press, p. 24