Comparison of ARMv7-A cores
This is a table comparing microarchitectures which implement the ARMv7-A (A means Application) instruction set architecture and mandatory or optional extensions of it, the last AArch32.
Table
- This list is incomplete; you can help by expanding it.
| Core | Decode width | Execution ports | Pipeline depth | Out-of-order execution | FPU | Pipelined VFP | FPU registers | NEON (SIMD) |
big.LITTLE role | Process technology | L0 cache | L1 cache | L2 cache | Core configurations | Speed per core (DMIPS/MHz) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| ARM Cortex-A5 | 1 | 8 | No | VFPv4 (optional) | 16 × 64-bit | 64-bit wide (optional) | No | 4-64 KB / core | 1, 2, 4 | 1.57 | |||||
| ARM Cortex-A7 | 2 | 5[1] | 8 | No | VFPv4 | Yes | 16 × 64-bit | 64-bit wide | LITTLE | 40/28 nm | 8-64 KB / core | up to 1 MB (optional) | 1, 2, 4, 8 | 1.9 | |
| ARM Cortex-A8 | 2 | 2[2] | 13 | No | VFPv3 | No | 32 × 64-bit | 64-bit wide | No | 65/55/45 nm | 32 KB + 32 KB | 256 or 512 (typical) KB | 1 | 2.0 | |
| ARM Cortex-A9 | 2 | 3[3] | 8-11 [4] | Yes | VFPv3 (optional) | Yes | (16 or 32) × 64-bit | 64-bit wide (optional) | Companion Core | 65/45/40/32/28 nm | 32 KB + 32 KB | 1 MB | 1, 2, 4 | 2.5 | |
| ARM Cortex-A12 | 3 | 11 | Yes | VFPv4 | Yes | 32 × 64-bit | 128-bit wide | No[5] | 32-64 KB + 32 KB | 256 KB to 8 MB | 1, 2, 4 | 3.0 | |||
| ARM Cortex-A15 | 3 | 8[1] | 15/17-25 | Yes | VFPv4 | Yes | 32 × 64-bit | 128-bit wide | big | 32/28 nm | 32 KB + 32 KB per core | up to 4 MB per cluster, up to 8 MB per chip | 2, 4, 8 (4×2) | 3.5 to 4.01 | |
| ARM Cortex-A17 | 3 | 11+ | Yes | VFPv4 | Yes | 32 × 64-bit | 128-bit wide | big | 32 KB + 32 KB per core | 256 KB up to 8 MB | up to 4 | ||||
| Qualcomm Scorpion | 2 | 3[6] | 10 | Yes (FXU&LSU Only)[7] | VFPv3 | Yes | 128-bit wide | No | 65/45 nm | 32 KB + 32 KB | 256 KB (single-core) 512 KB (dual-core) |
1, 2 | 2.1 | ||
| Qualcomm Krait[8] | 3 | 7 | 11 | Yes | VFPv4[9] | Yes | 128-bit wide | No | 28 nm | 4 KB + 4 KB direct mapped | 16 KB + 16 KB 4-way set associative | 1 MB 8-way set associative (dual-core)/2 MB (quad-core) | 2, 4 | 3.3 (Krait) 3.1 (Krait 200) 3.4 (Krait 300)[10] 3.6 (Krait 400) | |
| Apple Swift | 3 | 12 | Yes | VFPv4 | Yes | 32 × 64-bit | 128-bit wide | No | 32 nm | 32 KB + 32 KB | 1 MB | 2 | 3.5 |
See also
- Comparison of ARMv8-A cores
- List of ARM cores
- List of applications of ARM cores
- Multi-core processor
References
- ↑ 1.0 1.1 "big.LITTLE Processing with ARM Cortex-A15 & Cortex-A7" (PDF). ARM Holdings. Retrieved 6 August 2014.
- ↑ "Cortex-A8_Architecture". Texas Instruments. Retrieved 6 August 2014.
- ↑ "The ARM Cortex-A9 Processors" (PDF). ARM Holdings. Retrieved 6 August 2014.
- ↑ "Cortex-A9 Processor". ARM Holdings. Retrieved 15 September 2014.
- ↑ http://community.arm.com/groups/processors/blog/2014/09/30/arm-cortex-a17-cortex-a12-processor-update
- ↑ Klug, Brian (7 October 2011). "Qualcomm's New Snapdragon S4: MSM8960 & Krait Architecture Explored". Anandtech. Retrieved 6 August 2014.
- ↑ http://rtcgroup.com/arm/2007/presentations/253%20-%20ARM_DevCon_2007_Snapdragon_FINAL_20071004.pdf
- ↑ http://www.anandtech.com/show/4940/qualcomm-new-snapdragon-s4-msm8960-krait-architecture
- ↑ http://www.anandtech.com/show/5559/qualcomm-snapdragon-s4-krait-performance-preview-msm8960-adreno-225-benchmarks/2
- ↑ http://www.linleygroup.com/newsletters/newsletter_detail.php?num=4920
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