CSG 65CE02
Produced | From 1988 to 1988 |
---|---|
Common manufacturer(s) |
|
Max. CPU clock rate | 2 MHz to 10 MHz |
Instruction set | 6502 |
Package(s) |
|
The CSG 65CE02 is a 8/16-bit microprocessor developed by Commodore Semiconductor Group in 1988.[1] It is a member of the MOS Technology 6502 family.
Description
CSG 65CE02 registers | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
The 65CE02 is an improved version of the 6502. It is fabricated using 2 µm CMOS technology, allowing for lower power operation compared to previous NMOS and HMOS versions of the 65xx family. It is housed in a 40-pin DIP that is pin compatible with the 6502.[2]
Internally, the pipeline of the 65CE02 was redesigned to reduce the number of cycles required to execute an instruction. The 65CE02 can recover faster from engagement of the SYNC signal, which reduces the minimum instruction execution time from 2 cycles to 1 cycle.[3] These improvements allow the 65CE02 to execute code up to 25% faster than previous 65xx models.[2]
Additionally, a third index register (Z) was included, the stack pointer was widened to 16 bits, and the zero page addressing mode was superseded by the more flexible direct page addressing mode.[2]
The 65CE02 uses a superset of the GTE 65SC02 instruction set. In addition to the enhancements and bug fixes included in the 65SC02, the 65CE02 includes new instructions for indirect jumps (allows the use of jump tables), 16-bit branches, bit shifting (ASR) and stack relative loads/stores. Several read-modify-write memory instructions (ASL/DEC/INC/PSH/ROR) were enhanced to support 16-bit values. Lastly, instructions supporting the new registers were added.
Like the original 6502, the 65CE02 does not include bank switching support. Only 64KB of RAM can natively be accessed. Larger memory configurations require the use of an external MMU.
CSG 4510
The 4510 is a system in package (SiP) variant of the 65CE02 that includes two 6526 CIA I/O port controllers. It is housed in an 84-pin PLCC.[4]
Uses
The 65CE02 was used in the Commodore A2232 serial port card for the Amiga computer.[5][6] The 4510 was used in the unreleased Commodore 65 home computer [7] and the unreleased Commodore CDTV cost-reduced revision.[7][8]
References
- ↑ "MOS 65CE02 Microprocessor Data Sheet" (PDF).
- ↑ 2.0 2.1 2.2 "Commodore Semiconductor Group CSG65CE02 Technical Reference". zimmers.net. 2009-08-18. Retrieved 2013-06-21.
- ↑ "US patent 5088035: System for accelerating execution of program instructions by a microprocessor".
- ↑ "Amiga Stuff: 4510 Hardware Info".
- ↑ "Amiga Stuff: 65CE02 Hardware Info".
- ↑ "Big Book of Amiga Hardware: Commodore A2232".
- ↑ 7.0 7.1 "Commodore Knowledge Base: The Commodore 65".
- ↑ "Amiga Hardware Database: CDTV II".
External links
- Commodore Semiconductor Group CSG65CE02 Technical Reference
- 65CE02 Microprocessor (Preliminary) (Nov. 1988)
- 65CE02 package and die images
- Profile of Victor F. Andrade (principal 65CE02 LSI engineer)
|