Burst mode (computing)
Burst mode (alternatively burst-mode) is a generic electronics term referring to any situation in which a device is transmitting data repeatedly without going through all the steps required to transmit each piece of data in a separate transaction. The usual reason for having a burst mode capability, or using burst mode, is to increase data throughput.[1] The steps left out while performing a burst mode transaction may include A: waiting for input from another device; B: waiting for an internal process to terminate before continuing the transfer of data; or C: transmitting information which would be required for a complete transaction, but which is inherent in the use of burst mode.[2]
In the case of DMA, the DMA controller and the device are given exclusive access to the bus without interruption; the CPU is also freed from handling device interrupts.
The actual manner in which burst modes work varies from one type of device to another; however, devices that have some sort of a standard burst mode include the following:
- Random access memory (RAM), including EDO, SDRAM, DDR SDRAM, and RDRAM; only the last three are required to send data in burst mode, according to industry standards
- Hard disk drive (HDD) interfaces such as SCSI and IDE
- Accelerated Graphics Port (AGP) devices; partially, as the write-combining is similar in purpose and meaning
See also
- Asynchronous I/O
- Command queue
- Direct memory access (DMA)
- SDRAM burst ordering
References
- ↑ PCI Local Bus Specification Revision 2.2. Hillsboro, Oregon: PCI Special Interest Group. December 18, 1998. p. 82.
- ↑ PCI Local Bus Specification Revision 2.2. Hillsboro, Oregon: PCI Special Interest Group. December 18, 1998. p. 29.