Agnisys
 | |
| Private | |
| Industry | EDA |
| Founded | 2006 |
| Headquarters | Lowell, MA |
Key people | Anupam Bakshi, President/CEO |
| Website | www.agnisys.com |
Agnisys Inc. is a developer of electronic design automation[1] tools for the design and verification of IP, System-on-Chip(SoC), ASIC and FPGA. In May 2009, Agnisys released a new class of application that converted a Word processor into an EDA tool.[2] The application is called IDesignSpec, and it manages the registers in a design without the need of a traditional GUI or language. Another tool created by Agnisys called IVerifySpec was released in July 2009. In Jan 2010, Agnisys was the first company to announce [3] support for Mentor's OVM Register Package 1.0. Agnisys announced ISequenceSpec, a product that automates SoC, ASIC or FPGA register sequence test code generation.[4] Agnisys further expands its product offerings in June 2014 by announcing DVinsight [5] a product that provides Universal Verification Methodology editing and checking to help functional verification engineers streamline the verification process.
Overview
Agnisys Inc. was founded in 2006.
Products
- IDesignSpec: Spec Writing and Register Management[6][7][8]
- IVerifySpec: Specification, Verification and Requirement Tracking [9]
- ISequenceSpec: SoC, ASIC and FPGA Sequence to Code Generation [10]
- DVinsight: Design Verification Editor Checker for System Verilog [11] and Universal Verification Methodology [12][13]
Partners
- Spirit Consortium Reviewing Member
- OCP-IP Member
- Mentor Graphics Questa Vanguard Partner
- Synopsys VMM Catalyst Program
- Cadence Verification Alliance Program
- ARM Connected Partner
- Sun Microsystems Partner
- Red Hat Ready Partner
- Microsoft BizSpark Partner
- Platform Computing Select Partner
- TeamEDA Line card
External links
- Official Website
- Whitepaper: 20 Advantages for Automating your ASIC or FPGA Transition from Specification to Design
- Whitepaper: How to Streamline Universal Verification Methodology Process
- 15 Benefits of Working with Agnisys on your Chip Design Project
References
- ↑ Electronic Design Automation
- ↑ IDesignSpec Release 2009
- ↑ OVM
- ↑ ISequenceSpec Website Page
- ↑ DVinsight Press Release
- ↑ IDesignSpec supports IP-XACT
- ↑ IDesignSpec Press Release
- ↑ IDesignSpec Website Page
- ↑ IVerifySpec Website Page
- ↑ ISequenceSpec Website Page
- ↑ System Verilog
- ↑ Universal Verification Methodolog (UVM)
- ↑ DVinsight Website Page