ARM11

The ARM11 is a group of 32-bit RISC ARM processor cores licensed by ARM Holdings.

Overview

The ARM11 microarchitecture (announced 29 April 2002) introduced the ARMv6 architectural additions which had been announced in October 2001. These include SIMD media instructions, multiprocessor support and a new cache architecture. The implementation included a significantly improved instruction processing pipeline, compared to previous ARM9 or ARM10 families, and is used in smartphones from Apple, Nokia, and others. The initial ARM11 core (ARM1136) was released to licensees in October 2002.

The ARM11 family are currently the only ARMv6-architecture cores. There are however ARMv6-M cores (Cortex-M0 and Cortex-M1), addressing microcontroller applications;^[1] ARM11 cores target more demanding applications.

Differences from ARM9

In terms of instruction set, the ARM11 builds on the preceding ARM9 generation. It incorporates all ARM926EJ-S features and adds the ARMv6 instructions for media support (SIMD) and accelerating IRQ response.

Microarchitecture improvements in ARM11 cores^[2] include:

• SIMD instructions which can double MPEG-4 and audio digital signal processing algorithm speed
• Cache is physically addressed, solving many cache aliasing problems and reducing context switch overhead.
• Unaligned and mixed-endian data access is supported.
• Reduced heat production and lower overheating risk
• Redesigned pipeline, supporting faster clock speeds (target up to 1 GHz)
  • Longer: 8 (vs 5) stages
  • Out-of-order completion for some operations (e.g. stores)
  • Dynamic branch prediction/folding (like XScale)
  • Cache misses don't block execution of non-dependent instructions.
  • Load/store parallelism
  • ALU parallelism
• 64-bit data paths

JTAG debug support (for halting, stepping, breakpoints, and watchpoints) was simplified. The EmbeddedICE module was replaced with an interface which became part of the ARMv7 architecture. The hardware tracing modules (ETM and ETB) are compatible, but updated, versions of those used in the ARM9. In particular, trace semantics were updated to address parallel instruction execution and data transfers.

ARM makes an effort to promote good Verilog coding styles and techniques. This ensures semantically rigorous designs, preserving identical semantics throughout the chip design flow, which included extensive use of formal verification techniques. Without such attention, integrating an ARM11 with third party designs could risk exposing hard-to-find latent bugs. Due to ARM cores being integrated into many different designs, using a variety of logic synthesis tools and chip manufacturing processes, the impact of its register-transfer level (RTL) quality is magnified many times.^[3] The ARM11 generation focused more on synthesis than previous generations, making such concerns be more of an issue.

Cores

There are four ARM11 cores:

• ARM1136^[4]
• ARM1156, introduced Thumb2 instructions
• ARM1176, introduced security extensions^[5]
• ARM11MPcore, introduced multicore support

Chips

Raspberry Pi B+ with a Broadcom BCM2835 (ARM1176JZF-S)

This list is incomplete; you can help by expanding it.

• Ambarella A5s, A7, A7L
• Broadcom BCM2835 (Raspberry Pi), BCM21553
• Cavium ECONA CNS3000 series ^[6]
• CSR Quatro 4230, 45xx, 53xx
• Freescale Semiconductor i.MX3x series, such as i.MX31, i.MX35
• Nintendo CTR-CPU (Nintendo 3DS CPU)
• Infotmic IMAPX2xx
• Nvidia Tegra
• PLX Technology NAS782x
• MediaTek MTK6573
• Qualcomm MSM720x, MSM7x27
• Qualcomm Atheros AR7400
• Samsung S3C64xx, S5P64xx, S5L87xx, S5L89xx
• Telechips TCC8902
• Texas Instruments OMAP2 series, with a TMS320 C55x or C64x DSP as a second core

Documentation

The amount of documentation for all ARM chips is daunting, especially for newcomers. The documentation for microcontrollers from past decades would easily be inclusive in a single document, but as chips have evolved so has the documentation grown. The total documentation is especially hard to grasp for all ARM chips since it consists of documents from the IC manufacturer and documents from CPU core designer. (ARM Holdings).

A typical top-down documentation tree is: high-level marketing slides, datasheet for the exact physical chip, a detailed reference manual that describes common peripherals and other aspects of physical chips within the same series, reference manual for the exact ARM core processor within the chip, reference manual for the ARM architecture of the core which includes detailed description of all instruction sets.

Documentation tree (top to bottom)

1. IC manufacturer marketing slides
2. IC manufacturer datasheets
3. IC manufacturer reference manuals
4. ARM core reference manuals
5. ARM architecture reference manuals

IC manufacturer has additional documents, including: evaluation board user manuals, application notes, getting started with development software, software library documents, errata, and more.

See also

• ARM architecture
• List of ARM microprocessor cores
• List of applications of ARM cores
• JTAG

References

External links

ARM Holdings

• Official website
• ARM11 Technical Reference Manuals
• ARMv6 Architecture Reference Manual (requires registration)

Quick Reference Cards

• Instructions: Thumb (1), ARM and Thumb-2 (2), Vector Floating Point (3)
• Opcodes: Thumb (1, 2), ARM (3, 4), GNU Assembler Directives 5.

Other

• ARM11 lacks an integer hardware division instruction
• Yurichev, Dennis, "An Introduction To Reverse Engineering for Beginners" including ARM assembly. Online book: http://yurichev.com/writings/RE_for_beginners-en.pdf