X704
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The x704 is a microprocessor that implements the 32-bit version of the PowerPC instruction set architecture (ISA) developed by Exponential Technology. The microprocessor was notable for its high clock frequency (for the time, circa 1997) in the range of 400 to 533 MHz, its use of bipolar transistors for logic and CMOS circuits for memory, and its failure to see use in an Apple Macintosh, the opposite of what industry observers such as Microprocessor Report expected. Exponential Technology eventually failed as a result of the x704's lack of success, but some of its former employees founded Intrinsity, a start-up that developed a high clock frequency MIPS implementation, FastMath. The company has now left the microprocessor business and licenses Fast14 dynamic logic to third-parties such as ATI for their GPUs.
The x704 was a superscalar microprocessor that issued up to three instructions per cycle to an arithmetic logic unit (ALU), floating-point unit (FPU) and branch unit. To realize the short cycle times, the caches were kept small, limiting its performance. There are three levels of cache. The first consisted of separate 2 KB instruction and data caches. These were direct-mapped. The L2 cache was on-die and was 32 KB large. It is eight-way set set-associative. The L3 cache was larger, supporting capacities of 512 KB to 2 MB, and was located externally. The x704 contained 2.7 million transistors, of which 0.7 million were bipolar transistors and 2.0 million were metal oxide semiconductor (MOS), and measured 15 mm by 10 mm (150 mm2). It was fabricated in a 0.5 µm BiCMOS process with six levels of interconnect. It used 3.6 and 2.1 V power supplies and dissipated less than 85 W at 533 MHz. The x704 was packaged in a 356-ball ball grid array (BGA).
References
- Halfhill, Tom R. (November 1996). "PowerPC Regroups". Byte.
- Halfhill, Tom R. (December 1996). "PowerPC Speed Demon". Byte.
- Maier, Cliff A. et al. (1997). "A 533-MHz BiCMOS Superscalar RISC Microprocessor". IEEE Journal of Solid-State Circuits, Volume 32, Number 11, pp. 1625–1634.