Tensilica
Type | Subsidiary |
---|---|
Industry | Processor IP |
Founded | 1997 |
Headquarters | San Jose, California |
Key people | Chris Rowen, Jack Guedj, Martin Lund |
Products | Microprocessors, IP cores |
Website | www.tensilica.com |
Tensilica was a fabless semiconductor company based in Silicon Valley doing semiconductor intellectual property core business. It is now a part of Cadence Design Systems. Its dataplane processors (DPUs) bring together the strengths of CPUs and DSPs and custom logic with 10× to 100× the performance, making them suited for data-intensive processing tasks.
The Tensilica brand is best known for its customizable microprocessor cores, the Xtensa configurable processor. Other products include standard controllers (Diamond series), audio/video coding software libraries for Cadence Tensilica processor cores, and standalone (application-specific) hardware cores for audio/video CODECs, such as MPEG audio/video.
Tensilica was founded in 1997 by former employees of several other Silicon Valley processor and electronic design automation companies such as MIPS, and employed Earl Killian as chief software architect for several years.[1] On March 11, 2013, Cadence Design Systems announced its intent to buy Tensilica for approximately $380 million in cash.[2] Cadence completed the acquisition in April 2013, with a cash outlay at closing of approximately $326 million. The Tensilica team, led by Jack Guedj, will report to Martin Lund, who is Cadence's senior vice president of research and development for its SoC Realization Group.[3]
Processor cores
Cadence develops processor technology IP for use in synthesized chip designs primarily for embedded systems. The company sells licenses to its configurable, extensible Xtensa generated processor core technology, fixed Diamond processor cores, and audio and video encoding and decoding software.
Xtensa configurable cores
Xtensa is Cadence's best known processor IP architecture. IP vendors of embedded processor architectures typically offer the user choices in many of the IP core's implementation details: cache size, processor bus width, data and instruction RAMs, memory management and interrupt control. However, Cadence's Xtensa architecture offers a key differentiating feature, a user-customizable instruction set.
Using the supplied customization tools, customers can extend the Xtensa base instruction-set by adding new user-defined instructions. Extensions can include SIMD instructions, new register files, and additional data transfer interfaces for multiprocessor communication. After the final processor configuration is made and submitted, Cadence's processor generator service builds the configured Xtensa IP core, processor design kit, and software development kit.
The processor kit contains items necessary to integrate the configured IP into the customer's chip design environment: the core's hardware description (in synthesizeable RTL or physical postlayout form), timing & I/O constraints, requirements for technology-specific RAMs/caches/fifos. The software kit is built on the Eclipse-based integrated development environment, and uses a GNU derived tool-chain: C/C++ compiler, assembler, linker, debugger. An instruction set simulator enables customers to begin application development before actual hardware is available.
To help customers study the design tradeoffs inherent in different processor configurations, Cadence provides designers with the XPRES design space exploration tool. For a particular target application, XPRES enables customers to estimate many performance characteristics, such as execution throughput, cache/memory utilization, and power consumption.
Diamond standard controllers
Consistent processor architectures with limited configurability and no application specific extensions have the benefit of binary code portability. Cadence's product line of Diamond cores were created from Xtensa but have fixed instruction set architectures to provide this benefit. Diamond cores are targeted at DSP and multimedia applications such as audio and video.
Multimedia software
Cadence sells licenses to a range of audio encoder and decoder software that has been optimized to run on the Diamond Hifi audio processor and operate on common industry standards of digital audio compression. The company also sells licenses to a range of video encoder and decoder software that has been optimized to run on the Diamond VDO video core and operate on common industry standards of digital video compression.
History
- In 1997 Tensilica was founded by Chris Rowen and Harvey Jones.
- In 2002 Tensilica released support for flexible length instruction encodings, known as FLIX.
- In 2004 Tensilica released the XPRES tool for automatically exploring the range of available configuration trade-offs.
- In 2006 Tensilica sold the first less-configurable Diamond core licenses.
- In 2007 Tensilica sold the first Diamond VDO multiprocessor video core and software license.
- In 2013 Cadence Design Systems acquired Tensilica.
Company name
The brand name Tensilica comes from a combination of the word tensile, meaning capable of being extended, and the word silicon, the element of which Integrated circuits are primarily made.
References
- ↑ "Technical Advisory Board". Stretch. 2010-11-26. Retrieved 2010-11-26. "Earl ... He is the former Chief Architect of Tensilica and Silicon Graphics MIPS division, ..."
- ↑ "Cadence to Acquire Tensilica."
- ↑ Source: http://www.tensilica.com/news/432/330/Cadence-Reports-First-Quarter-2013-Financial-Results-and-Completes-Acquisition-of-Tensilica