TILE-Gx
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| Produced | 2010 |
|---|---|
| Designed by | Tilera |
| Common manufacturer(s) |
|
| Max. CPU clock rate | 1000[1] MHz to 1500[2] MHz |
| Min. feature size | 40nm to 40nm |
| Microarchitecture | VLIW RISC |
| Cores | 9,[3] 16,[4] 36,[5] 64, (upcoming) [1] 72,[6] 100 (upcoming)[7] |
TILE-Gx is a multicore processor family by Tilera. It consists of a mesh network[8] of up to 100 cores.[9] It is to be produced by TSMC[citation needed] with 40 nm. It was announced on February 19, 2013 that Tilera would produce a 72-core Tile-Gx CPU capable of processing high-bandwidth networks.[10]
- 64-bit core (3-issue)
- 32 KB L1 I-cache, 32 KB L1 D-cache (per core[8])
- 256 KB L2 cache (per core[8])
- up to 26 MB L3 cache (per chip)
- 4 MAC/cycle with SIMD extensions
- 2 or 4 ECC 72-bit DDR3 memory controllers (up to 2.1 GHz)
- Built-in crypto accelerator with 40 Gbit/s encryption (small packet) and 20 Gbit/s full-duplex compression, true random number generator, RSA accelerator
See also
References
- "Tilera Corporation Joins China's Wireless TD Forum as a Senior Member" (Press release). Tilera. 26 October 2009. Retrieved 16 June 2011.
- ↑ 1.0 1.1 "Tilera preps many-cored Gx chips for March launch". 30 January 2012. Retrieved 21 February 2013.
- ↑ "Tilera Goes After AMD, Intel With 100-core CPU". 26 October 2009. Retrieved 21 February 2013.
- ↑ "TILE-Gx8009 datasheet".
- ↑ "TILE-Gx8016 datasheet".
- ↑ "TILE-Gx8036 datasheet".
- ↑ "TILE-Gx8072 datasheet".
- ↑ "Tilera's Breakthrough 100 Core TILE-Gx100 Processor Nominated for EE Times Ace Award" (Press release). 25 March 2011.
- ↑ 8.0 8.1 8.2 "TILE-Gx achitecture shema" (JPG).
- ↑ "MIT's 100-core CPU Will Be Ready This Year". 24 January 2012. Retrieved 21 February 2013.
- ↑ "Tilera announces 72-core Tile-Gx chip". 19 February 2013. Retrieved 21 February 2013.
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