KOMDIV-64

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KOMDIV-64
Produced 2007
Designed by NIISI
Max. CPU clock rate 120 MHz to 350 MHz
Instruction set MIPS IV
Cores 1

The KOMDIV-64 (Russian: КОМДИВ-64) is a 64-bit microprocessor developed by NIISI, Russia.

It is compatible with PMC-Sierra RM7000.

Chips are marked as 1890VM5 (Russian: 1890ВМ5).

Performance is 0.9 dhrystones/MHz, 1.32 whetstones/MHz, 1.09 coremarks/MHz (1890ВМ5Ф version).[1]

KOMDIV-64 Highlights

  • implements the MIPS IV instruction set architecture (ISA)
  • in-order, dual-issue superscalar
  • 5-stage integer pipeline
  • 7-stage floating point pipeline
  • 16 KB L1 instruction cache
  • 16 KB L1 data cache
  • 256 KB L2 cache
  • 350 MHz clock rate
  • 26.6 million transistors

See also

References

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