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Resistive random-access memory (RRAM or ReRAM) is a new non-volatile memory type based on the memristor first developed by Hewlett Packard in 2008 and expected to begin commercial production by 2013[1] as a replacement for Flash, SSD, DRAM and SRAM. Several other companies have patented versions of ReRAM[2][3][4][5][6][7][8] but none were able to develop workable models of ReRAM prior to HP's discovery of the memristor. The technology bears some similarities to CBRAM and phase change memory.
Different forms of ReRAM have been disclosed, based on different dielectric materials, spanning from perovskites to transition metal oxides to chalcogenides. Even silicon dioxide has been shown to exhibit resistive switching as early as 1967,[9] and has recently been revisited.[10]
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The basic idea is that a dielectric, which is normally insulating, can be made to conduct through a filament or conduction path formed after application of a sufficiently high voltage. The conduction path formation can arise from different mechanisms, including defects, metal migration, etc. Once the filament is formed, it may be reset (broken, resulting in high resistance) or set (re-formed, resulting in lower resistance) by an appropriately applied voltage. Recent data suggest that many current paths, rather than a single filament, are probably involved.[11]
A memory cell can be deduced from the basic memory cell in three different ways. In the simplest approach, the pure memory element can be used as a basic memory cell, resulting in a configuration where parallel bitlines are crossed by perpendicular wordlines with the switching material placed between wordline and bitline at every cross-point. This configuration is called a cross-point cell. Since this architecture will lead to a large parasitic current flowing through non selected memory cells, the cross-point array has a very slow read access. A selection element can be added to improve the situation. A series connection of a diode in every cross-point allows to reverse bias all non selected cells. This can be arranged in a similar compact manner as the basic cross-point cell. Finally a transistor device (ideally a MOS Transistor) can be added which makes the selection of a cell very easy and therefore gives the best random access time, but comes at the price of increased area consumption.
For random access type memories, a transistor type architecture is preferred while the cross-point architecture and the diode architecture open the path toward stacking memory layers on top of each other and therefore are ideally suited for mass storage devices. The switching mechanism itself can be classified in different dimensions. First there are effects where the polarity between switching from the low to the high resistance level (reset operation) is reversed compared to the switching between the high and the low resistance level (set operation). These effects are called bipolar switching effects. On the contrary, there are also unipolar switching effects where both, set and reset operation, require the same polarity, but different voltage magnitude.
Another way to distinguish switching effects is based on the localization of the low resistive path. Many resistive switching effects show a filamentary behavior, where only one or a few very narrow low resistive paths exist in the low resistive state. In contrast, also homogenous switching of the whole area can be observed. Both effects can occur either throughout the entire distance between the electrodes or happen only in close proximity to one of the electrodes. Filamentary and homogenous switching effects can be distinguished by measuring the area dependence of the low resistance state.[12]
A large number of inorganic and organic material systems showing thermal or ionic resistive switching effects have been demonstrated in the literature. These can be grouped into the following categories[13]:
1. phase change chalcogenides like Ge2Sb2Te5 or AgInSbTe
2. binary transition metal oxides like NiO or TiO2
3. perovskites like Sr(Zr)TiO3 or PCMO
4. solid-state electrolytes like GeS, GeSe, or Cu2S
5. organic charge transfer complexes like CuTCNQ
6. organic donor–acceptor systems like Al AIDCN
7. various molecular systems
Papers at the IEDM Conference in 2007 suggested for the first time that ReRAM exhibits lower programming currents than PRAM or MRAM without sacrificing programming performance, retention or endurance.[14] On April 30, 2008 HP announced that they had discovered the memristor, a new circuit element introducing the first correct model of ReRAM, and on July 8 they announced they would begin prototyping ReRAM using their memristors.[15] At IEDM 2008, the highest performance ReRAM technology to date was demonstrated by ITRI,[16] showing switching times less than 10 ns and currents less than 30 microamps. At IEDM 2010, ITRI also broke the speed record, showing <0.3 ns switching time, while also showing process and operation improvements to allow yield up to 100%.[17]
ReRAM has the potential to become the front runner among other non-volatile memories. Compared to PRAM, ReRAM operates at a faster timescale (switching time can be less than 10 ns), while compared to MRAM, it has a simpler, smaller cell structure (less than 8F² MIM stack). Compared to flash memory and racetrack memory, a lower voltage is sufficient and hence it can be used in low power applications.
ITRI has recently shown that ReRAM is scalable below 30 nm.[18] The motion of oxygen atoms is a key phenomenon for oxide-based RRAM;[19] one study [20] has indicated that oxygen motion may take place in regions as small as 2 nm. It is believed that if a filament is responsible, it would not exhibit direct scaling with cell size.[21] Instead, the current compliance limit (set by an outside resistor, for example) could define the current-carrying capacity of the filament.[22]
A significant hurdle to realizing the potential of ReRAM is the sneak path problem which occurs in larger passive arrays. In 2010, complementary resistive switching (CRS) was introduced as a possible solution to the interference from sneak-path currents.[23] In the CRS approach, the information storing states are pairs of high and low resistance states (HRS/LRS and LRS/HRS) so that the overall resistance is always high, allowing for larger passive crossbar arrays.
A drawback to the initial CRS solution is the high requirement for switching endurance caused by conventional destructive readout based on current measurements. A new approach for a nondestructive readout based on capacity measurement potentially lowers the requirements for both material endurance and power consumption.[24]