Low-voltage differential signaling, or LVDS, is an electrical digital signaling system that can run at very high speeds over inexpensive twisted-pair copper cables. It was introduced in 1994, and has since become very popular in computers, where it forms part of very high-speed networks and computer buses.
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LVDS is a differential signaling system, meaning that it transmits information as the difference between the voltages on a pair of wires; the two wire voltages are compared at the receiver. In a typical implementation, the transmitter injects a constant current, typically 3.5 mA, into the wires, with the polarity depending on the logic level to be sent. The current passes through a resistor of about 100 to 120 ohms (matched to the characteristic impedance of the cable) at the receiving end, then returns in the opposite direction via the other wire. From Ohm's law, the voltage difference across the resistor is therefore about 350 mV. The receiver senses the polarity of this voltage to determine the logic level.
The small amplitude of the signal and the tight electric- and magnetic-field coupling between the two wires reduces the suseptibility to electromagnetic noise.
The low common-mode voltage (the average of the voltages on the two wires) of about 1.25 V allows LVDS to be used with a wide range of integrated circuits with power supply voltages down to 2.5 V or lower. The low differential voltage, about 350 mV as stated above, causes LVDS to consume very little power compared to other systems. At 2.5 V supply voltage the power to drive 3.5 mA becomes 8.75 mW, compared to the 90 mW dissipated by the load resistor for an RS-422 signal.
Logic Levels:[1]
| Vee | VOL | VOH | Vcc | VCMO |
| GND | 1.0 V | 1.4 V | 2.5–3.3 V | 1.2 V |
LVDS is not the only differential signaling system in use, but is currently the only scheme that combines low power dissipation with high speed.
LVDS became popular in the later half of the 1990s. Before that, computers were too slow to make use of such fast data rates, and the cost of twice as many wires for the same amount of data outweighed the speed benefits. Yet multimedia and supercomputer users, both of which needed to move large amounts of data over links several meters long (from a disk drive to a workstation, for instance) maintained a widespread interest in LVDS.
The first widespread application for LVDS was to transport video data from graphics adapters to computer monitors, particularly flat panels in notebook computers, using the Flat Panel Display Link (FPD-Link) by National Semiconductor (NSC). The LCD display module vendors commonly use the term LVDS instead of FPD-Link when referring to the input signal to their modules. The higher performance follow-ons were LVDS Display Interface (LDI) and OpenLDI standards. These standards allow a maximum pixel clock of 112 MHz, which suffices for a display resolution of 1400 x 1050 (SXGA+) at 60 Hz refresh. A dual link can boost the maximum display resolution to 2048 x 1536 (QXGA) at 60 Hz. FPD-Link works with cable lengths up to about 5 m, and LDI extends this to about 10 m. Mobile devices have begun to use Display Serial Interface which utilizes LVDS signaling.
Two examples of LVDS use in computer buses come from HyperTransport and FireWire, both of which trace their development back to the post-Futurebus work which also led to SCI. LVDS is supported in SCSI standards (Ultra-2 SCSI and later) to allow higher data rates and longer cable lengths. Serial ATA, PCI Express, RapidIO, and SpaceWire utilize LVDS to allow high speed data transfer.
Intel and AMD expect that the LVDS LCD-panel interface would no longer be supported in their product lines by 2013, with Embedded DisplayPort and Internal DisplayPort as preferred solutions.[2]
LVDS is often used for serial data transmission, which involves sending data bit-by-bit down a single pair of wires. This is in contrast to parallel transmission, in which several wires are used with a common ground to carry several signals at once. The high speed of LVDS, and its use of in-channel synchronization, allows more data to be sent using fewer wires than can be accomplished with a parallel bus. The device for converting between serial and parallel data is called a serializer/deserializer, abbreviated to SerDes.
LVDS does not specify a bit encoding scheme (i.e. start bit and stop bit). LVDS is the physical mechanism to transport bits across wires. Any user-specified encoding scheme can be sent/received across an LVDS link, including 8b/10b data. An 8b/10b encoding scheme is typically utilized when DC balance is desired, a necessity for AC-coupled transmission paths (such as capacitive or transformer-coupled paths).
When serial data transmission is not fast enough, data can be transmitted in parallel form using an LVDS pair for each bit or even byte (as in PCI Express or HyperTransport). This system is called parallel LVDS.
Bus LVDS, or BLVDS (by NSC) was the first variation of LVDS designed to drive multiple LVDS receivers, and uses 100-ohm terminations at each end of the differential transmission line to maintain the signal integrity. Standard LVDS transmitters are designed for point-to-point links, but multipoint bus systems can be made using modified LVDS transmitters with high-current outputs that can drive multiple termination resistors. Bus LVDS and LVDM (by TI) are de facto multipoint LVDS standards. Multipoint LVDS (MLVDS) is the TIA standard (TIA-899) that has evolved and is used in AdvancedTCA for some clock distribution.
MLVDS has two types of receivers. Type-1 are nearly compatible with LVDS and use a 0 Volt threshold. Type-2 use a 100 mV threshold to handle in a consistent way various errors such as open and short circuits. For MLVDS:
| Output | Input | ||
|---|---|---|---|
| Common mode | Amplitude | ||
| Min | 0.3 V | 0.480 V | −1.4 V |
| Max | 2.1 V | 0.650 V | 3.8 V |
The present form of LVDS was preceded by an earlier attempt, SCI-LVDS, which was a subset of the Scalable Coherent Interconnect (SCI) specified in the IEEE 1596.3 1995 standard. It was designed for interconnecting multiprocessing systems.
The ANSI/TIA/EIA-644-A (published in 2001) standard defines LVDS. This recommends a maximum data rate of 655 Mbit/s over twisted-pair copper wire, but predicts a possible speed of over 1.9 Gbit/s for an ideal transmission medium.[3]