Advanced Learning and Research Institute
Advanced Learning and Research Institute (ALaRI) is a privately sponsored graduate school on the 4th floor of the main building of the University of Lugano (see USI), in Switzerland.
The single program course available is Embedded System Design, diverging into the R&D or Business branch. Two years are required for a Master's degree (MSc), one year for a Master's of Advanced Studies (MAS). The primary language of instruction is English. The degree is jointly awarded by USI in collaboration with ETH Zurich and Politecnico Di Milano, Italy.
Coursework
Courses[3] are the same for MSc (R&D or Business) and MAS programs. MAS students must complete 70 ECTS (including thesis) within one year; MSc students must complete the 120 ECTS in two years. Courses are 25h to 50h in length, and vary in difficulty level (L, M, H) by time and absorption.
Courses
MSc Year 1
- Introductory Courses, in VHDL, C++, UML. (L)
- Hardware Architecture, basic digital logic, caches, pipelining. Evaluated on challenging exam, project in design space exploration. (L)
- Transform Theory : Fourier, Laplace, wavelets; MATLAB, exam. (H)
- Specification Languages: Focuses on description of components in a system; evaluated on successful completion of week-long SystemC project. (M)
- Software Compilers: General compiler theory and artificial language description; project with SUIF. (H)
- Statistics: General statistics course; exam.
- Cryptography implementation of DES/3DES, AES, DH, and other cryptographic methods on paper as theory and trace practice; exam. (H)
- Design Laboratory 1 . (M)
- Digital Control: overcoming problems posed by using digital processors for control theory; exam. (H)
- DSP in multimedia; MATLAB project. (M)
- Embedded Databases: database considerations for embedded devices. (L)
- Future trends in Microprocessor Architecture . (L)
- Networking for embedded TCP/IP cores. (L)
- Reprogrammable Systems: focus on FPGAs and efficient VHDL design; weeklong course and VHDL project. (H)
- RTOS and Scheduling: scheduling methods for RTOS; exam. (H)
- Validation and Verification methods used in low-level-software and hardware-synthesis.
MSc Year 2
- Dependable Systems. Low-difficulty course; emphasis on fault tolerance in memories and networks. (L)
- Low Power Design: Power analysis of architecture-level power reduction methods, evaluation of low-power methods with Synopsys PrimePower (non data-dependent tool). (M)
- Microelectronics: as described from the physics-level up to the gate-level; fast-paced challenging exam. (M)
- Algorithms for Wireless Com.. Highest difficulty course, using MATLAB to design high-efficiency wireless communication systems. (H)
- Hw/Sw Codesign: partitioning, design space exploration, interface synthesis, and estimation.
- Design Laboratory 2.
- Low Power Software: Evaluation of (architecture-level and) OS-level effects on power usage.
- Network on chip I/II : SoC IP core design; challenging exam on design and theory.
- Performance Evaluation of queues; exam, project. (H)
- Retargettable Compilers: efficient code generation for embedded systems (optimization, retargetability, low-power); lab, exam. (M)
- VLIW architectures, ILP architectures, compilers, software. (M)
Business Track
MSc students may opt to take on additional course-load: Finance, Accounting, Organization, Marketing, Purchasing, and a final business plan of a possible business implementing a given technology.
Master Thesis
Thesis topics fall into five categories[4]:
- Security and communications
- HW/SW for Advanced Applications
- System-Level Design
- Low-Power Design
- Pervasive Computing
Student life
The ALaRI has two student associations: EESTEC, and IEEE-RSAC8-SB. The EESTEC branch established in 2005 as observer (2007: LC) and serves the USI; but the majority of members are ALaRI due to the Computer Engineering program offered therein. An IEEE student branch is also established together with USI.
References
External links
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Switzerland portal |
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University portal |