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Half-nodes |
The 32 nanometer (32 nm) node is the step following the 45 nanometer process in CMOS semiconductor device fabrication. 32 nanometer refers to the average half-pitch (i.e., half the distance between identical features) of a memory cell at this technology level. Intel and AMD both produced commercial microchips using the 32 nanometer process in the early 2010s. IBM and the Common Platform also developed a 32 nm high-k metal gate process. Intel began selling its 32 nm processors on January 7, 2010, as Core i3, Core i5, and the dual-core mobile Core i7. The 32 nm process is expected to be superseded by commercial 22 nm technology in 2012.[1]
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Prototypes using 32 nm technology first emerged in the mid-2000s. In 2004, IBM demonstrated a 0.143 μm2 SRAM cell with a poly gate pitch of 35 nm, produced using electron-beam lithography and photolithography on the same layer. It was observed that the cell's sensitivity to input voltage fluctuations degraded significantly at such a small scale.[2] In October 2006, Interuniversity Microelectronics Centre (IMEC) demonstrated a 32 nm Flash patterning capability based on double patterning and immersion lithography.[3] The necessity of introducing double patterning and hyper-NA tools to reduce memory cell area offset some of the cost advantages of moving to this node from the 45 nm node.[4] TSMC similarly used double patterning combined with immersion lithography to produce a 32 nm node 0.183 μm2 six-transistor SRAM cell in 2005.[5]
Intel Corporation revealed its first 32 nm test chips to the public on 18 September 2007 at the Intel Developer Forum. The test chips had a cell size of 0.182 μm2, used a second-generation high-k gate dielectric and metal gate, and contained almost two billion transistors. 193 nm immersion lithography was used for the critical layers, while 193 nm or 248 nm dry lithography was used on less critical layers. The critical pitch was 112.5 nm.[6]
In late October 2007, Samsung disclosed a 30 nm NAND Flash patterning process, using self-aligned double patterning. Starting from a 60 nm half-pitch pattern, new material was deposited and etched in between features to produce a 30 nm half-pitch pattern. Presumably, this can be repeated once more for a 15 nm half-pitch. IM Flash Technologies launched a 32 Gbit NAND Flash built on 34 nm design rules in May 2008. This design rule could only be accomplished with double patterning using 193 nm lithography tools.
In January 2011, Samsung completed development of what it claimed was the industry's first DDR4 DRAM module using a process technology with a size between 30 nm and 39 nm. The module could reportedly achieve data transfer rates of 2.133Gbps at 1.2V, compared to 1.35V and 1.5V DDR3 DRAM at an equivalent 30 nm-class process technology with speeds of up to 1.6Gbps. The module used pseudo open drain (POD) technology, specially adapted to high-performance graphic DRAM to allow DDR4 DRAM to consume just half the current of DDR3 when reading and writing data.[7]
Intel's Core i3 and i5 processors, released in January 2010, were among the first mass-produced processors to use 32 nm technology.[8] Intel's second generation Core processors, codenamed Sandy Bridge, used the 32 nm manufacturing process. Intel's 6-core processor, codenamed Gulftown and built on the Westmere architecture, was released on March 16, 2010 as the Core i7 980x Extreme Edition, retailing for approximately USD$1,000.[9] Intel's lower-end 6-core, the i7-970, was released in late July 2010 for approximately USD$900.
AMD also released 32 nm SOI processors in the early 2010s. AMD's FX Series processors, codenamed "Zambezi" and based on AMD's Bulldozer" architecture, were released in October 2011. The technology utilised a 32 nm SOI process, two CPU cores per module, and up to four modules, ranging from a quad-core design costing approximately USD$130 to a $280 eight-core design.
In September 2011, Ambarella Inc. announced the availability of the 32 nm-based A7L system-on-a-chip circuit for digital still cameras, providing 1080p high-definition video capabilities.[10]
The successors to 32 nm technology will be the 22 nm and 16 nm nodes, per the International Technology Roadmap for Semiconductors. Intel began mass production of 22 nm semiconductors in late 2011,[11] while commercial 16 nm semiconductors are expected to enter production in 2013.
| Preceded by 45 nm |
CMOS manufacturing processes | Succeeded by 22 nm |