Zilog Z8000
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The Z8000 was a 16-bit microprocessor introduced by ZiLOG in 1979. The architecture was designed by Bernard Peuto while the logic and physical implementation was done by Masatoshi Shima, assisted by a small group of people. Z8000 was not Z80-compatible, and although it saw steady use well into the 1990s, it was not very widely used. However, the Z16C01 and Z16C02 Serial Communication Controllers still use the Z8000 core.
[edit] Feature
Although fundamentally a 16-bit architecture, some versions had 7-bit, segment registers that extended the address space to 8 megabytes.
The register set consisted of sixteen 16-bit registers, and there were instructions that could use them as 8-bit, 16-bit, 32-bit, and 64-bit registers. The register set was completely orthogonal, with register 15 conventionally designated as stack pointer, and register 14 for stack segment.
There was both a user mode and a supervisor mode.
Like the Z80, the Z8000 included built-in DRAM refresh circuitry. Although an attractive feature for designers of the time, overall the Z8000 was not especially fast and had some bugs, and in the end it was overshadowed by the x86 family.
One notable use of the Z8000 series was by Namco in the design of its famous Pole Position series of racing videogames. Two Z8002's (small-memory versions of the Z8000) were incorporated into the design.
The reported inclusion of the device within military designs (source:TechWeb [1]), perhaps provides an explanation for the continued survival of the Z8000 today, in the shape of the Z16C01/02 Serial Communication Controllers (Zilog SCC). Indeed, an active order code and datasheet may still be located upon the ZiLOG website.
The Zilog Z80000 was a 32-bit follow-on design.
[edit] External links
- http://www.kranenborg.org/z8000/
- http://www.zilog.com/
- http://www.old-computers.com/history/detail.asp?n=52&t=3
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