Z80182

From Wikipedia, the free encyclopedia

The Zilog Z80182 is an enhanced, faster version of the older Z80 and is part of the Z180 microprocessor family. It's nicknamed the Zilog Intelligent Peripheral Controller (ZIP).

It has the following features:

  • Two ESCC (enhanced serial channel controller) channels with 32-bit CRC
  • Two UART (serial controller interface) channels
  • Internal configurable address decoder
  • Three PIA (Programmable I/O adapter) ports
  • Two 16-bit timers
  • One CSIO (Clocked Serial Input/output) channel
  • One MMU (Memory management Unit) that expands the addressing range to 20 bits
  • Wait state generator
  • Two DMA channels
  • Interrupt controller
  • Extended instructions
  • 16550 MIMIC interface
  • Crystal oscillator

It's also fully static (the clock can be halted and no data in the registers will be lost) and has a low EMI option that reduces the slewrate of the outputs. It's available in several maximum operating frequencies (up to 33 MHz) and in 3V3 versions.

[edit] External links

Languages