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XDR DRAM or extreme data rate dynamic random access memory is a high-performance RAM interface and successor to the Rambus RDRAM it is based on, competing with the rival DDR2 SDRAM and GDDR4 technology. XDR was designed to be effective in small, high-bandwidth consumer systems, high-performance memory applications, and high-end GPUs. It eliminates the unusually high latency problems that plagued early forms of RDRAM. Also, the XDR DRAM have heavy emphasis on per pin bandwidth, which can benefit further cost control on PCB production. This is because fewer lanes are needed for the same amount of bandwidth. Rambus owns the rights to the technology. XDR is used by Sony in the PlayStation 3 console.[1]
[edit] Parameters
[edit] Performance
- Initial clock rate at 400 MHz. 600 MHz, 800 MHz with 1066 MHz planned for the future.
- Octal Data Rate (ODR): Eight bits per clock per lane.
- Each chip provides 8 or 16 lanes, providing 25.6 or 51.2 Gbit/s (3.2 or 6.4 GB/s) at 400 MHz.
[edit] Features
- Bi-directional differential Rambus Signalling Levels (DRSL)
- Programmable on-chip termination
- Adaptive impedance matching
- Eight bank memory architecture
- Up to four bank-interleaved transactions at full bandwidth
- Point-to-point data interconnect
- Chip scale package packaging
- Dynamic request scheduling
- Early-read-after-write support for maximum efficiency
- Zero overhead refresh
[edit] Power Requirements
- 1.8 V Vdd
- Programmable ultra-low-voltage DRSL 200 mV swing
- Low-power PLL/DLL design
- Power-down self-refresh support
- Dynamic data width support with dynamic clock gating
- Per-pin I/O power-down
- Sub-page activation support
[edit] Ease of system design
- Per-bit FlexPhase circuits compensate to a 2.5 ps resolution
- XDR Interconnect uses minimum pin count
[edit] Latency
- 1.25/2.0/2.5/3.33 ns request packets
[edit] See also
[edit] References
[edit] External links
