XDR2 DRAM
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This article contains information about scheduled or expected future computer chips. It may contain preliminary or speculative information, and may not reflect the final specification of the product. |
DRAM types |
XDR2 DRAM is a type of Dynamic Random Access Memory that is in development by Rambus. Announced in 2005-7-7 and has been released in March, 26 2008, it is the successor to XDR DRAM.
XDR2 DRAM is being used in high-end graphics cards and networking equipment.
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[edit] Changes over XDR DRAM
[edit] Signaling
The memory chips of XDR2 are targeted to run at 500 MHz, compared to 200 MHz memory chips found in XDR memory. Like XDR DRAM, XDR2 DRAM has data transfer rates at 16 times the memory chips' core clock speed, with signal bus running at 4 times the core clock speed. Combined with the faster memory chips, this results in the data bus running at an effective 8.0 GHz and the signal bus running at an effective 2.0 GHz. The XDR2 memory bus uses a Hex Data Rate (HDR) scheme, transferring data on the memory bus at 16 times the rate of the system clock running at 500 MHz.
[edit] Micro-threading
Banks within chips are organized into 2 channels, with each channel controlling half of the banks. Within each channel, there are 2 column and row decoders, with each set of row+column decoders addressing 8-bit of data. In 16-bank design, granularity is reduced from 32 bytes to 16 bytes.