Very-large-scale integration

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Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistor-based circuits into a single chip. VLSI began in the 1970s when complex semiconductor and communication technologies were being developed. The microprocessor is a VLSI device. The term is no longer as common as it once was, as chips have increased in complexity into the hundreds of millions of transistors.

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[edit] Overview

The first semiconductor chips held one transistor each. Subsequent advances added more and more transistors, and as a consequence more individual functions or systems were integrated over time. The first integrated circuits held only a few devices, perhaps as many as ten diodes, transistors, resistors and capacitors, making it possible to fabricate one or more logic gates on a single device. Now known retrospectively as "small-scale integration" (SSI), improvements in technique led to devices with hundreds of logic gates, known as large-scale integration (LSI), i.e. systems with at least a thousand logic gates. Current technology has moved far past this mark and today's microprocessors have many millions of gates and hundreds of millions of individual transistors.

As of early 2008, billion-transistor processors are commercially available, an example of which is Intel's Montecito Itanium chip. This is expected to become more commonplace as semiconductor fabrication moves from the current generation of 65 nm processes to the next 45 nm generations.

At one time, there was an effort to name and calibrate various levels of large-scale integration above VLSI. Terms like Ultra-large-scale Integration (ULSI) were used. But the huge number of gates and transistors available on common devices has rendered such fine distinctions moot. Terms suggesting greater than VLSI levels of integration are no longer in widespread use. Even VLSI is now somewhat quaint, given the common assumption that all microprocessors are VLSI or better.

[edit] Structured design

Structured VLSI design is a modular methodology originated by Carver Mead and Lynn Conway for saving microchip area by minimizing the interconnect fabrics area. This is obtained by repetitive arrangement of rectangular macro blocks which can be interconnected using wiring by abutment. An example is partitioning the layout of an adder into a row of equal bit slices cells. In complex designs this structuring may be achieved by hierarchical nesting.

Structured VLSI design had been popular in the early 1980s, but lost its popularity later because of the advent of placement and routing tools wasting a lot of area by routing, which is tolerated because of the progress of Moore's Law. When introducing the hardware description language KARL in the mid' 1970s, Reiner Hartenstein coined the term "Structured VLSI Design" (originally as "Structured LSI Design"), echoing Edsgar Dijkstras structured programming approach by procedure nesting to avoid chaotic spaghetti-structured programs.

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[edit] Further reading

  • Baker RJ (2007). CMOS: Circuit Design, Layout, and Simulation (IEEE Press Series on Microelectronic Systems). Wiley-IEEE Press. ISBN 0-470-22941-1. 
  • Conway, L & Mead, C (1980). Introduction to VLSI systems. Boston: Addison-Wesley. ISBN 0-201-04358-0. 
  • Chen, Wai-Kai (ed) (2006). The VLSI Handbook, Second Edition (Electrical Engineering Handbook). Boca Raton: CRC. ISBN 0-8493-4199-X. 
  • Harris, David M.; Weste, Neil H. E. (2005). CMOS VLSI design: a circuits and systems perspective. Boston: Pearson/Addison-Wesley. ISBN 0-321-26977-2. 

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