The Ultimate RISC (URISC)
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The Ultimate RISC (URISC) is the name given by researchers at the University of Waterloo to their implementation of a single-instruction computer. This extreme case of a reduced instruction set computer (RISC) is intended as a pedagogical tool for teaching the basics of computer architecture. URISC allows complete description of a fully functional digital computer, including both hardwired and microprogrammed control versions, in only a few pages. Others have also explored the same concepts under various names (see references below): Univ. of Iowa Ultimate RISC; OISC.
[edit] The single instruction
The single instruction for URISC consists of three memory addresses x, y, z. Obviously, no opcode is needed, given that we have only one instruction. When executed, this instruction computes the difference (y) − (x), assigns the value to y, and branches to z if the new value of y is negative.
[edit] References
Univ. of Waterloo URISC: F. Mavaddat and B. Parhami, URISC: The Ultimate Reduced Instruction Set Computer, Int'l J. Electrical Engineering Education, Vol. 25, No. 4, pp. 327-334, October 1988.
Univ. of Iowa Ultimate RISC: http://www.cs.uiowa.edu/~jones/arch/risc/
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