Stub Series Terminated Logic
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Stub Series Terminated Logic (SSTL) devices are a family of electronic devices for driving transmission lines. They are specifically designed for driving the DDR (double-data-rate) SDRAM modules used in computer memory. However, they are also used in other applications, notably, some PCI Express PHYs and other high-speed devices.
Three voltage levels for SSTL are defined:
- SSTL_3, 3.3 V, defined in EIA/JESD8-8 1996
- SSTL_2, 2.5 V, defined in EIA/JESD8-9B 2002
- SSTL_18, 1.8 V, defined in EIA/JESD8-15
All SSTL voltage specs reference a voltage that is exactly VDDQ/2. For example, the VREF for an SSTL_18 signal is exactly 0.9 Volts.
Terminations can be:
- Class I (one series resistor at the source and one parallel resistor at the load)
- Class II (one series resistor at the source and two parallel resistors, one at each end).
- Class III (asymmetrically parallel terminated)
- Class IIII (asymmetrically doubly parallel terminated)
[edit] See also
- High-Speed Transceiver Logic - HSTL