Image:Smart Cut SOI Wafer Manufacturing Schema.svg

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Smart_Cut_SOI_Wafer_Manufacturing_Schema.svg‎ (SVG file, nominally 400 × 900 pixels, file size: 18 KB)

[edit] Summary

I, the author of this drawing, distribute it under GFDL and Creative Commons.

This is a schematic drawing of "Smart Cut" method of manufacturing Silicon on insulator wafer.

[edit] Licensing

I, the copyright holder of this work, hereby publish it under the following licenses:

Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts.

This work is licensed under the Creative Commons Attribution 2.5 License.

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	Date/Time	Dimensions	User	Comment
current	14:42, 19 August 2007	400×900 (18 KB)	Cyferz (Talk \| contribs)	(I, the author of this drawing, distribute it under GFDL and Creative Commons. This is a schematic drawing of "Smart Cut" method of manufacturing Silicon On Insulator wafer.)