Talk:Sandy Bridge (microarchitecture)

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[edit] Teraflop processor

http://news.com.com/Intel+pledges+80+cores+in+five+years/2100-1006_3-6119618.html?tag=nefd.top

there might be a correlation.

Intel pledges 80 cores in 5 years. that's right aroudn the proper time period. Based on that ti would not be unreasonable to speculate that Intel would be using 20 through 40+ core on Gesher.

pure speculation though

No, the teraflop 80-core processor is a completely different beast that has very little to do with Gesher. See http://www.dailytech.com/Intel+Takes+the+Hood+Off+TeraScale+Computing/article6057.htm. Gesher will the evolutionary based on an evolved formed of the Core 2 Duo, while the teraflop chip is revolutionary, just as Conroe was revolutionary after NetBurst. --Conquerist 23:25, 3 March 2007 (UTC)

[edit] Found a contradiction in the node size

The main Intel Core 2 article, currently under the Successors heading, claims that the size is speculative and may be at 22 nm (with Nehalem possibly at 32 nm), while this article is toned in a way to not only make it sound more definite, but also that it's to be a 32 nm size. I'm not sure if it's speculation in this article as well, and in that case it needs to be marked so, and preferrably also agree with the other Wikipedia article. :-) -- Northgrove 15:48, 31 January 2007 (UTC)

The Core 2 article now states that Gesher will be based on the 32 nm process. Additionally, I have cited that Gesher is 32 nm both in this article and in the Core 2 Article. --Conquerist 23:25, 3 March 2007 (UTC)

[edit] Rename article?

Shouldn't the article be renamaed to "Sandy Bridge (microarchitecture)" (together with the Nehalem (CPU architecture) and Intel Core (CPU architecture) articles) to avoid using the word "architecture" for microarchitecture (hardware) and instruction set (software) possibly confusing a bit?

I suggested on Talk:Nehalem (CPU architecture) that we rename Intel Core (CPU architecture), Nehalem (CPU architecture), and Sandy Bridge (CPU architecture) to "Intel Core (CPU microarchitecture)", "Nehalem (CPU microarchitecture)", and "Sandy Bridge (CPU microarchitecture)". My reason is that the terms "architecture" and "microarchitecture" refer to different things. "Architecture" is for the overall design of the processor (as in the ISA), such as x86, POWER, Alpha, SPARC, etc. Microarchitecture, on the other hand, refers to the specific implementation of the design. CPUs with different architectures are not compatible, but those with different microarchitectures are compatible. That's my idea, what do you think? (And yes, I just copied this post from Talk:Intel Core (CPU architecture)) Imperator3733 23:50, 24 September 2007 (UTC)
I mentioned at Talk:Intel Core (CPU architecture) a new, revised idea for renaming these articles. The idea is to rename the articles to Intel Core (microarchitecture), Nehalem (microarchitecture), and Sandy Bridge (microarchitecture). Another possibility would be to have "Intel" in all the names (making the naming more consistent -- i.e. Intel Nehalem (microarchitecture) and Intel Sandy Bridge (microarchitecture). If we do that I would suggest making the change to other uArch pages (i.e. NetBurst to Intel NetBurst (microarchitecture), Intel P6 to Intel P6 (microarchitecture), etc). What do you think? I'll give this a week for comments. If the response is favorable, I (or someone else) will/can rename them. If there is no response, I'll probably wait a bit longer. If anyone sees this, please respond. Thank you. -- Imperator3733 00:22, 16 October 2007 (UTC)
The pages have now been renamed. See Intel Core (microarchitecture), Nehalem (microarchitecture), and Sandy Bridge (microarchitecture) -- Imperator3733 18:06, 24 October 2007 (UTC)

[edit] Tick-tock?

Can someone change this term to something un-jargony? —Preceding unsigned comment added by Alwayswiththequestions (talk • contribs) 22:36, 5 January 2008 (UTC)

Tick means a shrink to a smaller process technology, with minor changes to the design. Tock means a major design change on the same process as the previous Tick. For more information, see Intel Tick Tock. -- Imperator3733 (talk) 16:52, 21 February 2008 (UTC)
What platform will Sandy Bridge be released on? And where does the Montevina platform (2008) fit in the tick-tock model? Or can a new platform be released any time? But then, isn't there also supposed to be such model for platforms?
  1. Tock - Intel Core microarchitecture
  2. Tick - Shrink/derivative (Penryn)
  3. Tock - New Intel microarchitecture (Nehalem)
-- 83.101.9.165 (talk) 17:50, 27 February 2008 (UTC)
Montevina uses Penryn processors, so it would be a Tick. I'm guessing that Sandy Bridge would use a similar platform to that used by Nehalem (QPI/PCIe), but I don't know for sure. -- Imperator3733 (talk) 21:48, 27 February 2008 (UTC)

[edit] AMD's instruction sets and Intel?

Will Sandy Bridge contain SSE5, MMX+, 3DNow! and 3DNow!+ instruction sets? Please, add that info also to the main article. Urvabara (talk) 11:37, 21 February 2008 (UTC)

I'm not sure, but I think 3DNow! and 3DNow!+ are pretty much obsolete. Intel has never supported those instruction sets, so I don't think they would do so with Sandy Bridge. I have never heard of MMX+ -- could you please link to some information on it? I don't know if SSE5 will be included -- the time frames work out, but there haven't been any announcements one way or the other (I think). -- Imperator3733 (talk) 16:49, 21 February 2008 (UTC)
See this picture [1]. See also [2] and [3]. Is there any way to contact Intel engineers? I would like to know why not to support AMD instruction sets. Urvabara (talk) 16:03, 22 February 2008 (UTC)
That's the first time I've ever seen anything on MMX+. I guess its just integer SSE, so it seems to me that Intel probably supports those instructions (I think SSE2 added integer instructions).
As far as contacting Intel engineers, Intel doesn't publish contact information for its employees, but it does say that the email format is generally first.last@intel.com or first.middle_inital.last@intel.com (I think I'm remembering that correctly). Of course you have to know an employees name before you can use that. You could always try using Intel's "Contact Us" page, but my experience with that has been pretty bad. First they try an automated response that tries to analyze your message to provide possible links to your question (which has never worked for me), and then you need to escalate your question to a human. I have never gotten a satisfactory answer from them, but maybe you will. Good luck. -- Imperator3733 (talk) 22:17, 27 February 2008 (UTC)
Thanks! Urvabara (talk) 08:06, 28 February 2008 (UTC)