S-1990

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The S-1990 is a VLSI integrated circuit created by NEC for the MSX Turbo R home computer, and is called the "TurboR bus controller". Together with a R800 CPU and a T9769 MSX-Engine chip it forms the heart of a TurboR MSX-system.

The S-1990 was especially developed for MSX turbo R computers, computers which are outfitted with a ASCII R800-processor. To retain backwards compatibility with the older MSX 1, MSX 2 and MSX 2+ systems the turbo R also uses the Z80 CPU inside the T9769. The S-1990 is used to control the bus access so that either the R800 or the Z80 inside the T9769 can access the memory and peripherals. Because of the large speed of the R800 (28.636360 MHz compared to the 3,58 or 7.16 MHz of the Z80) the S1990 also implements a "wait state" mechanism to slow down access to slower legacy devices that otherwise could not keep up with the R800. Especially for the peripherals in the T9769, in particular the video display controller. Finally it also implements hardware assisted software debugging.

[edit] Technical specifications

ASCII S-1990 Turbo R bus controller
ASCII S-1990 Turbo R bus controller
Controller
  • For the ASCII R800 processor
  • For the Z80 processor inside the T9769 MSX-Engine
  • For Zilog Z80-timing emulation
  • For MSX-cartridge slot management, -memory control and I/O address decoder
  • For memory access, I/O control, RFSH#/M1#-simulation
  • For access to programmable peripherals (The S-1990 does not include these peripherals, they are contained within the T9769, but it controls access to them, and in particular it slows down the R800 CPU when accessing these peripherals, especially when accessing the VDP).
  • For the execution of kernel functions
  • For the pause function
Debug function
  • Memory address comparator: When the address bus of the R800 is watched and a designated address is accessed, an NMI is generated. The function is enabled when address bus line A8 is pulled low while resetting the S-1990.
  • NMI-status register: When the above-mentioned address comparator is triggered this register contains the source of the NMI.
  • Debug monitor for the cartridge slot register: When the above-mentioned address comparator is triggered, while operating the debug monitor, this control register controls the slot environment.
  • NMI-return address register: contains the return address to the user program, so it can return to the original program after exiting the debugger.
  • Breakpoints: When debug mode is enabled, pressing the pause key breaks the user program and jumps to a debugging Monitor in ROM.
chip package
160 pins QFP
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