Plasma Immersion Ion Implantation
From Wikipedia, the free encyclopedia
Plasma immersion ion implantation (PIII) or Pulsed plasma doping is a surface modification technique of extracting the accelerated ions from the plasma by applying a high voltage pulsed DC or pure DC power supply and targeting them into a suitable substrate or electrode with a semiconductor wafer placed over it, so as to implant the it with suitable dopants. The electrode is a cathode for an electropositive plasma, while it is an anode for an electronegative plasma. Plasma can be generated in a suitably designed vacuum chamber with the help of various plasma sources such as Electron Cyclotron Resonance plasma source which yields plasma with the highest ion density and lowest contamination level, helicon plasma source, capacitively coupled plasma source, inductively coupled plasma source, DC glow discharge and metal vapor arc(for metallic species). The vacuum chamber can be of two types - diode and triode type[1] depending upon whether the power supply is applied to the substrate as in the former case or to the perforated grid as in the latter.
[edit] Working
In a conventional immersion type of PIII system, also called as the diode type configuration [1], the wafer is kept at a negative potential since the positively charged ions of the electropositive plasma are the ones who get extracted and implanted. The wafer sample to be treated is placed on a sample holder in a vacuum chamber. The sample holder is connected to a high voltage power supply and is electrically insulated from the chamber wall. By means of pumping and gas feed systems, an atmosphere of a working gas at a suitable pressure is created[3].
When the substrate is biased to a negative voltage (few KV's), the resultant electric field drives electrons away from the substrate in the time scale of the inverse electron plasma frequency ωe-1 ( ~ l0-9 sec). Thus an ion matrix Debye sheath[1,2] which is depleted of electrons forms around it. The negatively biased substrate will accelerate the ions within a time scale of the inverse ion plasma frequency ωi-1 ( ~ 10-6 sec). This ion movement lowers the ion density in the bulk, which causes the sheath-plasma boundary to expand in order to sustain the applied potential drop,in the process exposing more ions. The plasma sheath expands until either a steady-state condition is reached, which is called Child Langmuir law limit; or the high voltage is switched off as in the case of Pulsed DC biasing. Pulse biasing is preferred over DC biasing because it creates less damage during the pulse ON time and neutralization of unwanted charges accumulated on the wafer in the afterglow period (i.e. after the pulse has ended). In case of pulsed biasing the TON time of the pulse is generally kept at 20-40 µs, while the TOFF is kept at 0.5-2 ms i.e. a duty cycle of 1-8%. The power supply used is in range of 500 V to hundreds of KV and the pressure in the range of 1-100 mTorr[2]. This is the basic principle of the operation of immersion type PIII.
In case of a triode type configuration, a suitable perforated grid is placed in between the substrate and the plasma and a pulsed DC bias is applied to this grid. Here the same theory applies as previously discussed, but with a difference that the extracted ions from the grid holes bombard the substrate, thus causing implantation. In this sense a triode type PIII implanter is a crude version of ion implantation because it does not contain plethora of components like ion beam steering, beam focusing, additional grid accelerators etc.
[edit] References
1. Michael A. Liberman and Allan J. Lichtenberg, Principles of plasma discharges and material processing, Ed. New York: John Wiley and Sons, 1994.
2. André Anders et al, Handbook of Plasma Immersion Ion Implantation and Deposition, Ed. New York: John Wiley and Sons, 2000.
3. W. Ensinger, “Semiconductor processing by plasma immersion ion implantation”, Materials science & engineering. A., Vol. 253, No. 1 - 2, 1998, pp. 258 - 268.
4. C.R. Viswanathan, “Plasma induced damage”, Microelectronic Engineering, Vol. 49, No. 1-2, November 1999, Pages 65-81.
