Phase detector
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A phase detector is a frequency mixer or analog multiplier circuit that generates a voltage signal which represents the difference in phase between two signal inputs. It is an essential element of the phase-locked loop (PLL).
Detecting phase differences is very important in many applications, such as motor control, servo mechanisms, and demodulators.
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[edit] Mechanic phase detector
Analogous to the phase sensitive detector is the synchronous motor, such as the micro-stepped stepper motor. The stator produces a rotating magnetic field by its windings. The rotor, which is a permanent magnet, feels an angular momentum if it is not aligned to this field. This will accelerate or slow down its rotation. This leads to an oscillation around the aligned position, which is damped by friction.
[edit] Electronic phase detector
Often one wants to imitate this behavior in a system, where the misalignment is not directly coupled to an angular momentum. And often even if the system is not of electronic nature, sensors and drivers are used, so that all of the PLL, but the feedback, is of electronic nature.
An electronic system stores the angle as a two component vector having this angle. The angle between two vectors is calculated by the inner product by means of an analog computer, this is also called a quadrature using so called electronic mixers. The inner product contains a sum over the components of the vector. Often only one component is available, then one has to wait a quarter period for that other component to rotate in. The sum is then replaced by an average over one period, which the phase detector burdens onto the filter of the PLL. Then one speaks of phase instead of angle. See Euler's formula for the introduction into the mathematical formulation.
No electronic component that exists can do a multiplication. A diodes and bipolar transistors take the exponential and in combination with addition and inversion can be used for multiplication (diode ring mixer).
Field effect transistors take the square and by means of the binomial equations can be used for multiplication. In the Gilbert cell one input is amplified in a differential amplifier and the mixing takes place in two more differential amplifiers. A large voltage between gate and drain or base and collector makes the current independent of small voltage changes here. Only the voltage between emitter and base or source and gate, which is close to threshold, dictates the current. When the source is connected to one input and the gate is connected to the other input, this is the same as taking the difference between the two signals. And as also the negative input signals are provided, the sum can also be taken. These sums are voltages and the square law of the field effect transistor converts it into a current. Two currents are added onto one load resistor, leading to the output voltage and on the other load resistor to yield the negative output voltage. The second pairs are not really differential amplifiers as they are not feed by a current source and thus the voltage in between is not floating. They need balanced inputs and a good bias. A large resistor on the lower power rail, which acts as a current source, feeds the first differential pair and this acts itself as a current source. Thus a load resistor is required to make it a voltage source for the fets, and in general some linearization may be applied.
Relaxing a bit, the exponential characteristic curve of a bipolar transistor can be approximated by a Taylor series and this shows that for small amplitudes the square dominates the signal. As this is only approximately valid, it is as well possible to make a second approximation, and feed all pairs as differential pairs. For phase detection one does not need a high quality multiplication. Considering square waves instead of sine waves a phase means a delay between the edges. The inner product becomes the XOR gate as it is used in the emitter-coupled logic.
This circuit is fast, because it uses only N-channel or NPN transistors, all signals are differential and can be transmitted through transmission lines, and though current and voltages between all the components have to settle before a valid output is available. And because even if the signals are meant to be binary the transistors are used in the linear region and just touching the saturation and cut off region to prevent drifting away of the logic levels in consecutive operations. It needs a lot support, like a lot of power, level shifters for the signals, and baluns or current mirrors.
Many more signal combinations are possible, like sine with square or sine with pulses using only one transistor, but only sine waves prevent the False lock, which is a phenomenon that can occur when a phase-locked loop synchronizes to a harmonic of the intended signal rather than the signal itself. Limiting the frequency at which the PLL can operate can prevent false lock, but it may not be desirable to limit the PLL oscillator this way.
The XOR gate can also be implemented by NAND gates (or NORs in ECL) adding some latency, but more importantly in this application not reducing the cut off frequency. Adding a feedback and therefore building an RS-Flip-flop (electronics) allows one to use only the leading edges of the pules. The last NAND is removed, instead two signals are generated, to indicate from which signal the edge comes first. They are called late and early. Interestingly this circuit blends over into frequency detector for signals with large frequency difference. Considering the above mentioned synchronous motor this feature can be used to soft start an electric motor with a high inertia attached to it and then lock it as hard as possible. This circuit is called the phase frequency detector. This type also avoids the False lock.
The next stage in a PLL is an electronic filter, like in the figure an RC-filter. For this the voltage signal from the phase detector would be sent through a resistor, before loading a capacitor. Most practical circuits use an active replacement, a transimpedance amplifier, called a charge pump. The leakage resistor in the figure should just hint on more filter components to come, see PLL article. The phase detector locks on 90°, but the phase frequency detector locks on zero phase and allows to use the charge pump only for short periods. Relative to this period the delay between the edges is large and the circuit is more sensitive. In reality the finite turn on and turn off times of the charge pump create a so called dead band, that is no sensitivity at 0°. This is prevented in some chips (ref. Maxim) by introducing a delay (see figure 1) into the logic circuit which is matched to the added turn on and turn off times.
Of course, for low speed and high flexibility it is advantageous to convert more and more parts of the PLL into the digital domain. Either one of the signal paces an analog to digital converter and a computer calculates the phase. Or the output of the phase (-frequency) detector goes into a time to digital converter instead of a charge pump.
[edit] Optical phase detectors
Phase detectors are also known in optics. They are basically interferometers. For pulsed (amplitude modulated) light, it is said to measure the phase between the carriers. It is also possible to measure the delay between the envelopes of two short optical pulses by means of cross correlation in a nonlinear crystal. And it is possible to measure the phase between the envelope and the carrier of an optical pulse, by sending a pulse into an nonlinear crystal. There the spectrum gets wider and at the edges the shape depends significantly on the phase.
[edit] dated
Phase detectors range from very simple to complex in design. An XOR logic gate makes a passable phase detector. When the two compared signals are completely in phase, the two equal inputs to the XOR gate will output a constant level of zero. With a 1° phase difference, the XOR gate will output a "1" for the duration of the signals being different (1/360th of the cycle). When the signals are 180° apart, (one is high when the other is low, and vice versa) the XOR gate puts out a steady "1" signal. Integration over one period of the reference oscillator of the output signal results in an analog voltage proportional to the phase difference. In reality it is proportional to the absolute value of the phase. So if an out of phase condition occurs, the control loop does not know in which direction to correct. Therefore it is usually locked on 90°.
A phase detector can also be made from an analog multiplier, which is more suited for sine waves, sample and hold circuit, charge pump, or a logic circuit consisting of flip-flops, the last one is shown in the figure, which has the ability to phase lock to signals with large frequency mismatches. These phase detectors have more desirable properties such as better accuracy at small phase differences.
[edit] References
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This article does not cite any references or sources. (April 2007) Please help improve this article by adding citations to reliable sources. Unverifiable material may be challenged and removed. |
http://www.analog.com/UploadedFiles/Data_Sheets/AD8343.pdf http://www.eie.polyu.edu.hk/~ensurya/lect_notes/commun_cir/Ch8/Chapter8.htm#2-lawMixer http://www.datasheetcatalog.com/datasheets_pdf/S/A/6/0/SA602.shtml http://en.wikipedia.org/wiki/Differential_amplifier http://www.maxim-ic.com/appnotes.cfm/an_pk/1130
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