Pentium FDIV bug

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The Pentium FDIV bug was a bug in Intel's original Pentium floating point unit. Certain floating point division operations performed with these processors would produce incorrect results. According to Intel, there were a few missing entries in the lookup table used by the divide operation algorithm.[1]

The flaw was publicly disclosed by Professor Thomas Nicely, then at Lynchburg College, in 1994[2].

Although encountering the flaw was extremely rare in practice (Byte magazine estimated that 1 in 9 billion floating point divides with random parameters would produce inaccurate results),[3] both the flaw and Intel's handling of the matter were heavily criticized. Intel ultimately recalled the defective processors.

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[edit] Chronology

Professor Thomas Nicely, then a professor of mathematics at Lynchburg College, had written code to enumerate primes, twin primes, prime triplets, and prime quadruplets. Nicely noticed some inconsistencies in the calculations on June 13, 1994 shortly after adding a Pentium system to his group of computers, but was unable to eliminate other factors (such as programming errors, motherboard chipsets, etc.) until October 19, 1994. On October 24, 1994 he reported the issue to Intel. According to Nicely, his contact person at Intel would later admit that Intel had been aware of the problem since May 1994, when the flaw had been discovered when testing the FPU for its new Intel P6 core, first used in the Pentium Pro.

On October 30, 1994, Nicely sent an email out describing the error he had discovered in the Pentium floating point unit to various contacts, requesting reports of testing for the flaw on 486-DX4s, Pentiums and Pentium clones[4].

This flaw in the Pentium FPU was quickly verified by other people around the Internet, and became known as the Pentium FDIV bug (FDIV is the x86 assembly language instruction for floating-point division). Other people found division problems where the result returned by the Pentium was off by up to 61 parts per million.

The story first appeared in the press on November 7, 1994, in an article [5] in Electronic Engineering Times, "Intel fixes a Pentium FPU glitch" by Alexander Wolfe.

The story was subsequently picked up by CNN in a segment which aired on November 21, 1994. This brought it into widespread public prominence.

Publicly, Intel acknowledged the floating point flaw but claimed that it was not serious and would not affect most users. Intel offered to replace processors to users who could prove that they were affected. However, although most independent estimates found the bug to be of little importance and would have negligible effect on most users, it caused a great public outcry. Companies like IBM (whose IBM 5x86C microprocessor competed at that time with the Intel Pentium line) joined the condemnation.

On December 20, 1994 Intel offered to replace all flawed Pentium processors on the basis of request, in response to mounting public pressure[6]. This had a huge potential cost to the company, although it turned out that only a small fraction of Pentium owners bothered to get their chips replaced. Some of the defective chips were later turned into key rings by Intel.

[edit] Affected models

This problem occurred only on some models of the original Pentium processor. Any Pentium family processor with a clock speed of at least 120 MHz is new enough not to have this bug.

On affected models, the Intel Processor Frequency ID Utility checks for the presence of this bug.

The following tables list the 10 affected processors. The 39 S-spec of those 10 processors are not listed in the intel processor spec finder web page.

Pentium P5 800nm 5V
Family Model Stepping Manufacturing Stepping Clock rate FSB speed S-spec
5 1 3 B1 60 MHz 60 MHz Q0352
5 1 3 B1 60 MHz 60 MHz Q0412
5 1 3 B1 60 MHz 60 MHz SX753
5 1 3 B1 66 MHz 66 MHz Q0353
5 1 3 B1 66 MHz 66 MHz Q0413
5 1 3 B1 66 MHz 66 MHz SX754
5 1 5 C1 60 MHz 60 MHz Q0466
5 1 5 C1 60 MHz 60 MHz SX835
5 1 5 C1 60 MHz 60 MHz SZ949
5 1 5 C1 66 MHz 66 MHz Q0467
5 1 5 C1 66 MHz 66 MHz SX837
5 1 5 C1 66 MHz 66 MHz SZ950
Pentium P54C 600nm 3,3V
Family Model Stepping Manufacturing Stepping Clock rate FSB speed S-spec
5 2 1 B1 75 MHz 50 MHz Q0601
5 2 1 B1 90 MHz 60 MHz Q0542
5 2 1 B1 90 MHz 60 MHz Q0613
5 2 1 B1 90 MHz 60 MHz Q0543
5 2 1 B1 90 MHz 60 MHz SX879
5 2 1 B1 90 MHz 60 MHz SX885
5 2 1 B1 90 MHz 60 MHz SX909
5 2 1 B1 90 MHz 60 MHz SX874
5 2 1 B1 100 MHz 66 MHz Q0563
5 2 1 B1 100 MHz 66 MHz Q0587
5 2 1 B1 100 MHz 66 MHz Q0614
5 2 1 B1 100 MHz 66 MHz SX886
5 2 1 B1 100 MHz 66 MHz SX910
5 2 2 B3 75 MHz 50 MHz Q0606
5 2 2 B3 75 MHz 50 MHz SX951
5 2 2 B3 90 MHz 60 MHz Q0628
5 2 2 B3 90 MHz 60 MHz Q0611
5 2 2 B3 90 MHz 60 MHz Q0612
5 2 2 B3 90 MHz 60 MHz SX923
5 2 2 B3 90 MHz 60 MHz SX922
5 2 2 B3 90 MHz 60 MHz SX921
5 2 2 B3 90 MHz 60 MHz SX942
5 2 2 B3 90 MHz 60 MHz SX943
5 2 2 B3 90 MHz 60 MHz SX944
5 2 2 B3 90 MHz 60 MHz SZ951
5 2 2 B3 100 MHz 66 MHz Q0677
5 2 2 B3 100 MHz 66 MHz SX960

The presence of the bug can be checked manually by performing the following calculation in any application that uses native floating point numbers, including the Calculator in Windows 95/98:

4195835.0/3145727.0 = 1.333 820 449 136 241 002 (Correct value)
4195835.0/3145727.0 = 1.333 739 068 902 037 589 (Flawed Pentium)

[edit] References

  1. ^ FDIV Replacement Program: Description of the Flaw. Intel (2004-07-09). Retrieved on 2006-12-19.
  2. ^ Professor Thomas Nicely. Pentium FDIV flaw FAQ.
  3. ^ Tom R. Halfhill (1995-03). "An error in a lookup table created the infamous bug in Intel's latest processor". BYTE (March 1995). 
  4. ^ Professor Thomas Nicely. Original Pentium FDIV flaw e-mail.
  5. ^ Alexander Wolfe. Intel fixes a Pentium FPU glitch.
  6. ^ Intel adopts upon-request replacement policy on Pentium processors with floating point flaw; Will take Q4 charge against earnings. Business Wire (1994-12-20). Retrieved on 2006-12-24.

[edit] See also

[edit] External links