Pentium
From Wikipedia, the free encyclopedia
- This article is about the original Pentium microprocessor. For CPU brands using the "Pentium" trademark (e.g. Pentium II, Pentium III, etc.) see Pentium (brand). For the hydrogen isotope, see Hydrogen-5.
Pentium Central processing unit |
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75 MHz classic Pentium processor |
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Produced: | From 1993 to 1999 |
Manufacturer: | Intel |
Max CPU clock: | 60 MHz to 300 MHz |
FSB speeds: | 50 MHz to 66 MHz |
Min feature size: | 0.8 µm to 0.25 µm |
Instruction set: | x86 |
Microarchitecture: | P5 |
Cores: | 1 |
Socket: | Socket 4, Socket 5, Socket 7 |
Core name: | P5. P54, P54CS, P55C, Tillamook |
The Pentium[1] brand refers to Intel's single-core x86 microprocessor[2] based on the P5 fifth-generation microarchitecture. The name 'Pentium' was derived from the Greek penta, meaning 'five', and the Latin ending -ium.
Introduced on March 22, 1993[3], the Pentium succeeded the Intel486, which number "4" signified the fourth-generation microarchitecture. Intel selected the Pentium name after courts had disallowed trademarking of names containing numbers - like "286", "i386", "i486" - though, sometimes, the Pentium is unofficially referred to as i586. In 1996, the original Pentium was succeeded by the Pentium MMX branded CPUs still based on the P5 fifth-generation microarchitecture.
Starting in 1995, Intel (inconsistently) used the "Pentium" registered trademark in the names of families of post-fifth-generations of x86 processors branded as the Pentium Pro, Pentium II, Pentium III, Pentium 4 and Pentium D (see Pentium (brand)). Although they shared the x86 instruction set with the original Pentium (and its predecessors), their microarchitectures were radically different from the P5 microarchitecture of CPUs branded just as the "Pentium" and "Pentium MMX". In 2006, the Pentium briefly disappeared from Intel's roadmaps[4][5] to reemerge in 2007 and solidify in 2008[6].
Vinod Dham is often referred to as the father of the Intel Pentium processor.[7][8]
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[edit] Improvements over i486
- Superscalar architecture - The Pentium has two datapaths (pipelines) that allow it to complete more than one instruction per clock cycle. One pipe (called "U") can handle any instruction, while the other (called "V") can handle the simplest, most common instructions. The use of more than one pipeline is a characteristic typical of RISC processors designs, the first of many to be implemented on the x86 platform, thus signaling the road to take, and showing that it was possible to merge both technologies, creating almost “hybrid” processors.
- 64-bit data path - This doubles the amount of information pulled from the memory on each fetch. This doesn't mean that the Pentium can execute 64-bit applications; its main registers are still 32 bits wide.
- MMX instructions (later models only) - A basic SIMD instruction set extension designed for use in multimedia applications.
Pentium architecture chips offered just under twice the performance of a 486 processor per clock cycle. The fastest Intel 486 parts were almost the same speed as a first-generation Pentium, and the AMD Am5x86 was roughly equal to the Pentium 75.
The Pentium ("Classic") series were designed to run at over 100 million instructions per second (MIPS), [1] with the 75 MHz model running at 126.5 MIPS. [2]
[edit] Models
The earliest Pentiums were released at the clock speeds of 66 MHz and 60 MHz. Later on 75, 90, 100, 120, 133, 150, 166, 200, and 233 MHz versions gradually became available. 266 and 300 MHz versions were later released for mobile computing. Pentium OverDrive processors were released at speeds of 63 and 83 MHz as an upgrade option for older 486-class computers.
Pentium 66 MHz and 60 MHz chips contained 3.1 million transistors. Transistor count has increased every year at a rate of about 40% per year. The release of the Pentium-III Coppermine a decade after the initial Pentium 66 release raised transistor count past 28 million transistors.Semiconductor Chip Manufacturing Process History
Code name | P5 | P54C | P54CS | P55C | Tillamook | |||||||||||||||
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Product code | 80500/ 80501 | 80502 | 80503 | |||||||||||||||||
Process size (µm) | 0.80 | 0.60 | 0.35 | 0.28 | 0.25 | |||||||||||||||
Clock speed (MHz) | 60 | 66 | 75 | 90 | 100 | 120 | 133 | 150 | 166 | 200 | 120* | 133* | 150* | 166 | 200 | 233 | 200 | 233 | 266 | 300 |
Bus speed (MHz) | 60 | 66 | 50 | 60 | 66 | 60 | 66 | 60 | 66 | 60 | 66 | 60 | 66 | |||||||
Voltage | 5.0 | 5.0 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 2.8 | 2.8 | 2.8 | 2.8 | 2.8 | 2.8 | 1.8 | 1.8 | 1.8 | 1.8 |
Introduced | 22 March 1993 | 10 October 1994 | 7 March 1994 | 27 March 1995 | June 1995 | 4 January 1996 | 10 June 1996 | 27 March 1995 - 1 November 1995 | 8 January 1997 | 2 June 1997 | August 1997 | January 1998 | January 1999 |
- * These were only available as Mobile Pentium MMX chips for laptops.
[edit] P5, P54C, P54CS
The original Pentium microprocessor had the internal code name P5 and the product code 80501 (80500 for the earliest steppings). This was a pipelined in-order superscalar microprocessor, produced using a 0.8 µm process. It was followed by the P54C (80502), a shrink of the P5 to a 0.6 µm process, which was dual-processor ready and had an internal clock speed different from the front side bus (it's much more difficult to increase the bus speed than to increase the internal clock). In turn, the P54C was followed by the P54CS, which used a 0.35 µm process.
The early versions of 60-100 MHz Pentiums had a problem in the floating point unit that, in rare cases, resulted in reduced precision of division operations. This bug, discovered in Lynchburg, Virginia in 1994, became known as the Pentium FDIV bug and caused great embarrassment for Intel, which created an exchange program to replace the faulty processors with corrected ones. The 60 and 66 MHz 0.8 µm versions of the Pentium processors were also known for their fragility and their (for the time) high levels of heat production - in fact, the Pentium 60 and 66 were often nicknamed "coffee warmers". They were also known as "high voltage Pentiums", due to their 5 V operation. The heat problems were removed with the P54C, which ran at a much lower voltage (3.3 V). P5 Pentiums used Socket 4, while P54C started out on Socket 5 before moving to Socket 7 in later revisions. All desktop Pentiums from P54CS onwards used Socket 7. Another bug known as f00f bug was discovered soon afterwards, but fortunately, operating system vendors responded by implementing workarounds that prevented the crash.
The 32-bit bus Pentium -- a sort of oddity among the other Pentium processors, P24T Pentium OverDrive for 486 systems were released in 1995, which were based on the 3.3 volt 0.6 µm technology at 63 or 83Mhz clock speed. Since the chips used Socket 2 or Socket 3 of the 486 platform, the Pentium architecture had to be modified in many ways to operate on narrower 32-bit data bus and slower on-board L2 cache architecture. As such, they came equipped with a 32 KiB L1 cache, double what a pre-P55C Pentium came equipped with. The chips also included an attached fan/heatsink assembly in addition to onboard power regulation to convert the 5 V power circuitry on 486 boards down to the Pentium's 3.3 V needs.
[edit] P55C, Tillamook
The P55C (or 80503) was developed by Intel's Research & Development Center in Haifa, Israel. It was sold as Pentium with MMX Technology (usually just called Pentium MMX); although it was based on the P5 core (the 0.35 µm process was also used for this series) it featured a new set of 57 "MMX" instructions intended to improve performance on multimedia tasks, such as encoding and decoding digital media data.
The new instructions work on new data types: 64-bit packed vectors of either eight 8-bit integers, four 16-bit integers, two 32-bit integers, or one 64-bit integer. So, for example, the PADDUSB (Packed ADD Unsigned Saturated Byte) instruction adds two vectors, each containing eight 8-bit unsigned integers together, pairwise; each addition that would overflow saturates, yielding 255, the maximum unsigned value that can be represented in a byte. These rather specialized instructions generally require special coding by the programmer for them to be used. MMX did not achieve significant popularity until after the P55C's lifetime[citation needed].
The performance of the P55C was improved over previous versions by a doubling of the Level 1 CPU cache from 16 KiB to 32 KiB.
Pentium P55C notebook CPUs used a "mobile module" that held the CPU. This module was a PCB with the CPU directly attached to it in a special smaller form factor. The module snapped to the notebook motherboard and typically a heat spreader plate was installed and made contact with the module. Such notebooks frequently used the Intel 430MX chipset, a feature-reduced 430FX. However, with the 0.25 µm Tillamook Mobile Pentium MMX (named after a city in Oregon), the module also held the 430TX chipset along with the system's 512 KiB SRAM cache memory.
[edit] As a benchmark
Microsoft and many other companies use the original Pentium as a standard for specifications of requirements. For example, Microsoft's stated requirements for the Microsoft Visual Studio 2005 Team Edition, include (at least) a Pentium processor running at a clock speed of 600 MHz (required), or 1 GHz (recommended). To find out if another processor meets the requirement, a conversion must be used that gives its speed in terms of standard Pentium clock rates. For example, a Pentium Pro would meet the requirement running at a lower clock speed, because of its more advanced architecture. An equivalency chart is usually used to compare more modern processors to find out if they meet this requirement.
[edit] As a trademark
Intel used the "Pentium" trademark in many brand names of x86 (instruction set) processors of later generations with different microarchitectures radically departed from the P5 found in CPUs originally branded as the "Pentium" only. They include:
- Pentium Pro
- Pentium II, Pentium II Xeon
- Pentium III, Pentium III Xeon
- Pentium 4, Mobile Pentium 4, Mobile Pentium 4 M, Pentium 4 Extreme Edition
- Pentium M
- Pentium D, Pentium Extreme Edition
- Pentium Dual-Core
[edit] Competitors
[edit] See also
- Vinod Dham
- CPU design
- COAST (Cache on a stick), L2 cache modules for Pentium
- IA-32 processor design and instruction set
- Pentium Compatible Processor
[edit] References
- ^ Microprocessor Hall of Fame. Intel. Retrieved on 2007-08-11.
- ^ Intel® Pentium® Processor Family. Intel. Retrieved on 2007-08-14.
- ^ View Processors Chronologically by Date of Introduction:. Intel. Retrieved on 2007-08-14.
- ^ "Intel "Conroe-L" Details Unveiled", DailyTech. Retrieved on 2007-08-16.
- ^ The multicore era is upon us - CNET Asia
- ^ "Intel to unify product naming scheme", TG Daily. Retrieved on 2007-08-12.
- ^ Vinod Dham, Father of Pentium Processor, on Investing in India. PodTech.net (2006-10-16). Retrieved on 2007-08-16. “Vinod Dham, Father of Pentium Processor”
- ^ Bach, John (10 2000). The Technology Trailblazer: Vinod Dham. University Relations, University of Cincinnati. Retrieved on 2007-08-16. “Today, known in the industry as the "Father of the Pentium"”
[edit] External links
- CPU-Collection.de - Intel Pentium images and descriptions
- Plasma Online Intel CPU Identification
- Pictures of all known Pentium chips at chipdb.org
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