MULTICUBE FP7 Project
From Wikipedia, the free encyclopedia
| MULTICUBE | |
| MULTI3 | |
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| Keywords | MPSoC, DSE, Architecture, Embedded, Multimedia |
|---|---|
| Funding agency | European Commission |
| Project type | Specific Targeted Research Project (STReP) |
| Reference | FP7-ICT-2007-1-216693 |
| Objective | Multi-objective Design Space Exploration of MPSoC Architectures for Embedded Multimedia Applications |
| Participants |
PoliMi, DS2, ST, IMEC, ESTECO, ALaRI, University_of_Cantabria, ICT |
| Budget | Overall: - Funding: - |
| Duration | January 2008 - July 2010 |
| Web site | http://www.multicube.eu |
MULTICUBE (or MULTI3) is an European Seventh Framework Program (FP7) funded project for Multi-objective Design Space Exploration of Multi-Processor-System-on-Chip Architectures for Embedded Multi-media Applications.
Contents |
[edit] Purpose
The MULTICUBE project's purpose on the definition of an automatic multi-objective Design Space Exploration (DSE) framework to be used to tune the System-on-Chip architecture for the target application evaluating a set of metrics (e.g. energy, latency, throughput, bandwidth, QoS, etc.) for the next generation embedded multimedia platforms.
[edit] Aim & Methodology
1. Define an automatic multi-objective DSE framework to find design alternatives that best meet system constraints and cost criteria, strongly dependent on the target application, but also to restrict the search space to crucial parameters to enable an efficient exploration. In the developed DSE framework, a set of heuristic optimization algorithms must be defined to reduce the overall exploration time by computing an approximated Pareto set of configurations with respect to the selected figures of merit. Once the approximated Pareto set has been built, the designer can quickly select the best system configuration satisfying the constraints.
2. Define a run-time DSE framework based on the applications of the results of the static multi-objective design exploration to optimize the run-time allocation and scheduling of different application tasks. The design exploration flow results in a Pareto-optimal set of design alternatives with different speed, energy, memory and communication bandwidth parameters. This information can be used at run-time by the operation system to make an informed decision about how the resources should be distributed over different tasks running on the multi-processor system on-chip. This resource distribution can not be performed during the design exploration itself, since it depends on which tasks are active at a particular point in time.
As per FP7 guidelines, workpackages need to be produced regularly.
[edit] Partners
The research collaborators and roles are shortly described as listed[1]:
- Politecnico di Milano's Embedded Systems Design and Design Methodologies research group, work in the field of designing computer architectures and developing methodologies and prototype tools to support the automation of different phases of design of advanced embedded systems, have been involved with system-level design space exploration has been one of mainstream lines of research in the recent years.
- Design of Systems on Silicon (DS2, Italy), work in the field of powerline communications, are notable for participation in standards development(IEEE, ETSI, CENELEC, CISPR) and hi-tech EU projects (EUREKA clusters); they are developing a complete Hw/Sw PLC SoC-based chipset.
- STMicroelectronics, large semiconductors corporation, notable for participating in many simultaneous European Union projects (EUREKA, ENIAC, ENEA) and awards for work related to developing embedded processor solution(s) for content processing in mobile equipment ("Pocket Multi-Media"), collaborates via their Italy R&D division, and China R&D division.
- IMEC is a Belgium research center (1000+ researchers), collaborates with knowledge in integrated information and communication systems, microsystems, components and packaging, and advanced training in microelectronics.
- ESTECO (Italy) created in 1999 to turn an European Union sponsored project on Design Optimization into a commercial product, a multi-objective optimization platform: modeFRONTIER; and collaborate as partners on research for MULTICUBE.
- ALaRI (Italian-Switzerland) is a graduate training & research institute for Embedded Systems Design; collaborates via research and (software) model development performed by PhD and MSc students.
- University of Cantabria, Spain is a training & research center, and collaborates via the research of their Microelectronics Engineering Group.
- Institute of Computing Technology, of the Chinese Academy of Sciences, specializes in computer science and technology in China, and collaborates with hosted European and Chinese research.
[edit] Impact
The project's result will be a framework (e.g. software) that automatically performs a "design space exploration" of an MPSoC system, taking as input the characterization of an application running on the MPSoC, and outputting the Pareto points: the most fit set of architecture configuration points.
