MOS Technology 6510

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Image of the innards of a Commodore 64 showing the 6510 CPU (40-pin DIP, lower left). The chip on the right is the 6581 SID. The production week/year (WWYY) of each chip is given below its name.

The MOS Technology 6510 is a microprocessor designed by MOS Technology, Inc., and is modified form of the very successful 6502.

The primary change from the 6502 was the addition of an 8-bit general purpose I/O port (only six I/O pins were available in the most common version of the 6510). In addition, the address bus could be made tristate.

The 6510 was only widely used in the Commodore 64 home computer (and in significantly smaller numbers in the C64's portable version, the SX-64). In both the C64 and SX-64 the extra pins of the processor were used to control the computer's memory map, and in the C64 also for controlling the electric motor of the Datassette tape recorder. It was possible, by writing the correct bit pattern to the processor at address $01, to completely expose the full 64KB of RAM in the C64, leaving no ROM or I/O hardware exposed.

[edit] Variants

In 1985 MOS produced the 8500, an HMOS version of the 6510. Other than the process change, it is virtually identical to the NMOS version of the 6510. The 8500 was originally designed for use in the modernised C64, the C64C. However in 1985, limited quantities of 8500s were found on older NMOS based C64s. It finally made its official debut in 1987, appearing in a motherboard using the new 85xx HMOS chipset.

Pin configuration of the most common variation of the 6510 CPU

The 7501/8501 variant of the 6510 was used in Commodore's C16, C116 and Plus/4 home computers, and the 2 MHz-capable 8502 variant was used in the Commodore C128. All these CPUs are opcode compatible (including undocumented opcodes), except the 8502, where some differences concerning the undocumented opcodes have been reported.

The Commodore 1551 disk drive used the 6510T, a version of the 6510 with eight I/O lines. The NMI and RDY signals are not available.