Modified Harvard architecture
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The Modified Harvard Architecture is a variation of the Harvard computer architecture that allows the contents of the instruction memory to be accessed as if it were data. Most modern computers that are documented as Harvard Architecture are, in fact, Modified Harvard Architecture.
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[edit] Harvard architecture
The original Harvard architecture computer, the Harvard Mark I, employed entirely separate memory systems to store instructions and data. The CPU fetched the next instruction and loaded or stored data simultaneously and independently. This is by contrast with a Von Neumann architecture computer, in which both instructions and data are stored in the same memory system and (without the complexity of a cache) must be accessed in turn. The physical separation of instruction and data memory is sometimes held to be the distinguishing feature of modern Harvard architecture computers. However, with entire computer systems being integrated onto single chips, the use of different memory technologies for instructions (e.g. Flash memory) and data (typically read/write memory) in Von Neumann machines is becoming popular. The true distinction of a Harvard machine is that instruction and data memory occupy different address spaces. In other words, a memory address does not uniquely identify a storage location (as it does in a Von Neumann machine); you also need to know the memory space (instruction or data) to which the address applies.
[edit] Modified Harvard architecture
A pure Harvard architecture computer suffers from the disadvantage that mechanisms must be provided to separately load the program to be executed into instruction memory and any data to be operated upon into data memory. Additionally, modern Harvard architecture machines often use a read-only technology for the instruction memory and read/write technology for the data memory. This allows the computer to begin execution of a pre-loaded program as soon as power is applied. The data memory will at this time be in an unknown state, so it is not possible to provide any kind of pre-defined data values to the program.
The solution is to provide a hardware pathway and machine language instructions so that the contents of the instruction memory can be read as if they were data. Initial data values can then be copied from the instruction memory into the data memory when the program starts. If the data is not to be modified (for example, if it is a constant value, such as pi, or a text string), it can be accessed by the running program directly from instruction memory without taking up space in data memory (which is often at a premium).
[edit] Harvard or Von Neumann?
Three characteristics of Harvard architecture machines may be used to distinguish them from Von Neumann machines:
- Instruction and data memories occupy different address spaces. That is, there is an address 'zero' in instruction space that refers to an instruction storage location and also an address 'zero' in data space that refers to a distinct data storage location. By contrast, a Von Neumann machine stores both instructions and data in a single address space, so address 'zero' refers to only one thing and whether the binary pattern in that location is interpreted as an instruction or data is defined by how the program is written. This characteristic unambiguously identifies a Harvard machine; that is, if instruction and data memories occupy different address spaces then the architecture is Harvard, not Von Neumann.[1]
- Instruction and data memories have separate hardware pathways to the central processing unit (CPU). This is pretty much the whole point of modern Harvard machines and why they still co-exist with the more flexible and general Von Neumann architecture. Separate memory pathways to the CPU allow instructions to be fetched and data to be accessed at the same time without the considerable extra complexity of a cache. Therefore, when performance is important but a cache is impractical (due to complexity or the difficulty of predicting execution speed) and the extra difficulty of programming a Harvard machine is acceptable, this becomes the architecture of choice. However, a Von Neumann machine with independent instruction and data caches also has separate hardware pathways to the CPU (for precisely the same purpose of increasing speed). Some processors are referred to as Harvard architecture even though instructions and data occupy the same address space because they cache instructions and data separately and pass them to the CPU via separate hardware pathways. As a result, this characteristic is no longer unambiguous. From a programmer's point-of-view, a processor with a single address space for instruction and data is programmed in the same way whether or not it has cache and is therefore a Von Neumann machine. From the point-of-view of the CPU designer, simultaneous access to instructions and data may appear sufficiently important to warrant a special term to distinguish the results from a Von Neumann machine with no cache or a unified cache.[2]
- Instruction and data memories are implemented in different ways. The original Harvard machine, the Mark I, stored instructions on a punched paper tape and data in electro-mechanical counters. This, however, was entirely due to the limitations of technology available at the time. Modern embedded computer systems (for example, the microcontroller in a digital camera) have the need to store their software programs without power and without the disk drives used in general purpose computers. Therefore, instructions are stored in a read-only memory technology. Read/write memory (which loses its contents when power is removed) is only used for data storage. There is no obstacle to combining different memory technologies in a single address space and thus building a Von Neumann machine with read-only instructions and read/write data.[3] So, this characteristic of the original Harvard machine is no longer relevant as a distinction from Von Neumann machines.
[edit] High Level Language support
Standards-based high-level languages, such as the C language, do not inherently support modified Harvard architecture machines.[1] There are no standard language constructs that cause a data object to be placed in and accessed directly from instruction memory (not even the const modifier has precisely this meaning). Therefore compilers for Harvard architecture machines use various non-standard language extensions for this purpose or require the programmer to drop down to assembly code to access data in instruction memory. This apparent deficiency of supposed close-to-the-hardware languages like C should not be surprising as there is no inherent support for I/O either, and, like instruction memory in a Harvard machine, I/O exists in a distinct address space from data.
[edit] Modern uses of the Modified Harvard architecture
The principal historical advantage of the Harvard architecture - simultaneous access to more than one memory system - has been nullified by modern cache systems, allowing the more flexible Von Neuman machine equal performance in most cases. The Modified Harvard architecture has thus been relegated to niche applications where the ease-of-programming / complexity / performance trade-off favors it.
- Microcontrollers (complete computers on a single chip) may use the Modified Harvard architecture for the reasons it was first developed, which are to improve memory access speeds with moderate complexity and to allow the instruction and data memory systems to be implemented independently of each other. Microcontrollers are frequently programmed in assembly language, making the lack of high-level language support moot, or with non-portable high-level languages translated by customized compilers.
- Digital signal processors generally execute small, highly-optimized programs where performance must be achieved at all costs. The difficulties of coping with an unusual architecture are of secondary concern to speed of execution. As a result, some DSPs have multiple data memories in distinct address spaces in a kind-of hyper-Harvard architecture to facilitate single-instruction-multiple-data processing.
[edit] Examples of Modified Harvard machines
[edit] "True" or "Software" Modified Harvard machines
The following processors are Modified Harvard machines by the most rigorous definition, which is that program and data memory occupy different address spaces. As a result, the instruction set includes special instructions to read program memory as data, for example, LPM (Load Program Memory) in the Atmel AVR. This creates certain difficulties in programming with standard high-level languages, such as C, and non-standard extensions are necessary.
[edit] Atmel AVR microcontrollers
Documentation for the AVR port of the GCC compiler explains clearly how the problem of placing data in instruction memory is solved.[1]
[edit] Texas Instruments TMS320 digital signal processors
[edit] ZiLOG Z8Encore! microcontrollers
The Z8Encore! has the unusual ability for a running program to write data directly to instruction memory as well as to read it. However, because this memory is Flash, ones can be changed to zeros but not vice-versa. (To do that a page erase must be performed, which changes a large chunk of memory to all-ones.)
[edit] "Hardware" Modified Harvard machines
The following processors are Von Neumann machines from the software point of view, having program and data memory in the same address space, but have hardware features associated with Harvard machines. For example, they may have separate instruction and data cache memories with independent paths to the CPU. Or, they may have one or more high-speed data memory blocks with direct pathways to digital signal processing functions which can be used for special applications but are not fundamental to the processor's operation.
[edit] Analog Devices, Inc. Blackfin processors
[edit] See also
[edit] Notes and References
- ^ a b c The maintainers of the standard C library for the GCC port to the Atmel AVR microcontroller state in Data in Program Space that separate address spaces imply a Harvard architecture. They go on to explain that the C language was not designed for Harvard architecture machines and describe the non-standard extensions adopted by GCC for the AVR and the AVR C library to allow access to data stored in instruction (program) memory. They even take the trouble to explain why the const keyword cannot be pressed into service to distinguish data objects to be placed in instruction memory.
- ^ The author of Technical Support FAQ 3738 for ARM follows a contorted chain of logic to conclude that the ARM core, which any programmer would consider Von Neumann, is a Harvard architecture core because it has two caches.
- ^ Texas Instruments, in Getting Started, refer to the MSP430 microcontroller as "von-Neumann", although it has both read-only and read/write memory. Peripheral devices are also mapped to the device's single address space, making it very easy to program in the C language.
