Maskless lithography

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In maskless lithography, radiation used to expose the photosensitive emulsion (or photoresist) is not projected from, or transmitted through, a photomask.[1] Instead, most commonly, the radiation is focused to a narrow beam. The beam is then used to directly write the image into the photoresist, one or more pixels at a time. An alternative method, developed by Micronic Laser Systems, is to scan a programmable reflective photomask, which is then imaged onto the photoresist. This has the advantage of higher throughput and flexibility. Both methods are used to define patterns on photomasks.

A key advantage of maskless lithography is the ability to change lithography patterns from one run to the next, without incurring the cost of generating a new photomask. This may prove useful for double patterning.

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[edit] Forms of maskless lithography

Currently, the main forms of maskless lithography are electron beam and optical. In addition, focused ion beam systems have established an important niche role in failure analysis and defect repair. Finally, systems based on arrays of probe tips have recently been announced.

[edit] Electron beam

The most commonly used form of maskless lithography today is electron beam lithography. Its widespread use is due to the wide range of electron beam systems available accessing an equally wide range of electron beam energies (~10 eV to ~100 keV). This is already being used in wafer-level production at eASIC, which uses conventional direct-write electron beam lithography to customize a single via layer for low-cost production of ASICs.

Most maskless lithography systems currently being developed are based on the use of multiple electron beams.[2] The goal is to use the parallel scanning of the beams to speed up the patterning of large areas. However, a fundamental consideration here is to what degree electrons from neighboring beams can disturb one another (from Coulomb repulsion).

[edit] Optical

Direct laser Writing is a very popular form of optical maskless lithography, which offers flexibility, ease of use, and cost effectivness in R&D processing : such equipments offer now high resolution (sub-micronic patterns) and offer the best compromise between performance and cost when waited resolution don't require resolution lower than 200nm.Kloe SA offers currently a range of fast prototyping direct laser writing equipments, offering the combination of high resolution patterning, high depth of field and large writing surfaces.

Interference lithography is an other form of optical maskless lithography, but is limited to forming periodic patterns only.

For improved image resolution, ultraviolet light, which has a shorter wavelength than visible light, is used to achieve resolution down to around 100 nm. The main optical maskless lithography systems in use today are the ones developed for generating photomasks for the semiconductor and LCD industries.

[edit] Focused ion beam

Focused ion beam systems are commonly used today for sputtering away defects or uncovering buried features. The use of ion sputtering must take into account the redeposition of sputtered material.

[edit] Probe tip contact

IBM has developed an alternative maskless lithography technique based on atomic force microscopy see here.[3] In addition, Dip Pen Nanolithography is a promising new approach for patterning submicron features.

[edit] Future of maskless lithography

Maskless lithography is already used for the production of photomasks and in limited wafer-level production. There are some obstacles ahead of its use in high-volume manufacturing. First, there is a wide diversity of maskless techniques. Even within the electron-beam category, there are several vendors (Mapper, Canon, Advantest) with entirely different architectures and beam energies. Second, throughput targets exceeding 10 wafers per hour still need to be met. Third, the capacity and ability to handle the large data volume (Tb-scale) needs to be developed and demonstrated.

[edit] References

  1. ^ R. Menon et al,, Materials Today, Feb. 2005, pp. 26-33 (2005).
  2. ^ T. H. P. Chang et al., Microelectronic Engineering 57-58, pp. 117-135 (2001).
  3. ^ P. Vettiger et al., IBM J. Res. Develop. 44, pp. 323-340 (2000).