MASTAR MOSFET Model
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The MASTAR (Model for Analog and digital Simulation of mos TrAnsistoRs)[1] [2] is an analytical model of Metal-Oxide Semiconductor Field-Effect Transistors, developed using the voltage-doping transformation (VDT) technique [3] [4] . MASTAR offers good accuracy and continuity in current and its derivatives in all operation regimes of the MOSFET devices. The model has been successfully used in CAD/EDA simulation tools[5].
The actual official definition of the acronymus MASTAR is Model for Assessment of CMOS Technologies And Roadmaps.
[edit] References
- ^ Skotnicki, T.; Merckel, G. & Denat, C., “A Model For Analog Simulation Of Subthreshold, Saturation And Weak Avalanche Regions In MOSFETs”, International Workshop on VLSI Process and Device Modeling: 146-147, May 14-15, 1993
- ^ Skotnicki, T.; Denat, C.; Senn, P.; Merckel, G. & Hennion, B., “A new analog/digital CAD model for sub-halfmicron MOSFETs”, Technical Digest., International Electron Devices Meeting: 165-168, Dec. 11-14, 1994
- ^ Skotnicki, T. & Marciniak, W., “A new approach to threshold voltage modelling of short-channel MOSFETS”, Solid-State Electronics 29 (11): 1115-1127, November 1986
- ^ Skotnicki, T.; Merckel, G. & Pedron, T., “The voltage-doping transformation: a new approach to the modeling of MOSFET short-channel effects”, IEEE Electron Device Letters 9 (3): 109 - 112, March 1988
- ^ Modeling MOS Devices Using the MASTAR Model with UTMOST III
