Talk:Magnetic core memory

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[edit] Core plane image

Kudos to Sanders muc for contributing the core scans. :-) Would you be able to count the lines (and number of cores) in one direction so we could calculate the memory capacity in bits & bytes for the plane shown? It would give the article even more educational value if the readers were able to immediately compare core to semiconductor RAM chips in that parameter, I think. --Wernher 16:07, 2 May 2004 (UTC)

Ok, I counted them. Its an array of 128x128 rings, totalling to 2 KiB. Is there, BTW, a way to get a caption under an image without the "thumb" option? Sanders muc 09:31, 3 May 2004 (UTC)
Yes, I fixed it, at least temporarily. What I'd really like, for consistency, is a captioning scheme looking just like the thumb & caption scheme but without the thumb option. However, I haven't found this yet. --Wernher 20:17, 5 May 2004 (UTC)
"framed"? — Omegatron 13:54, 24 March 2007 (UTC)

[edit] Closeup image

The caption says the distance between the cores (rings) are 1mm. Eh -- which distance, the short one between cores in a 'quad-core group', or the long one, between cores in different groups? --Wernher 02:06, 8 May 2004 (UTC)

  • Well, sort of the middle between them. Its only a rough estimate. Maybe I take a magnifying glass with me to check. By the way, the quad groups don't have anything in common. It's only due to mechanical strain in the wiring. Sanders muc 11:34, 9 May 2004 (UTC)

"The light color vertical and horizontal wires are X and Y wires, the diagonal wires are Sense wires, the dark colored horizontal wires are Inhibit wires."

What diagonal wires?? — Omegatron 01:48, 18 March 2007 (UTC)
Exactly what I was going to ask. Even at the full resolution I can't see any diagonal wires. --Zerotalk 06:21, 29 April 2007 (UTC)
There are no diagonal wires in this core plane as it is a "2-wire" plane, not the "4-wire" plane in the photo originally shown when the caption was written. Someone changed the photo. Note: a "2-wire" memory does not use X-Y addressing as discribed in the text. It uses word line addressing (probably the thicker wires) and multiple bit line sense/inhibit wires (probably the thinner wires). I wish someone would change the photo back so it matches the text and caption. -- 205.175.225.22 (talk) 00:30, 30 January 2008 (UTC)

[edit] Core in Star Trek

I would like to add this to Core Trivia:

  • In Star Trek, computer memory devices are called Memory core, interestingly similar to Core memory.

But, it looks like a POV problem. Especially that I'd love to say how core and memory are being misused there... Now what do you think could be said here about the subject? And where could I criticize that misuse? :) --Arny 08:19, 23 October 2005 (UTC)

I don't know if it belongs in trivia, but I've noticed - with the introduction of multiple processor Intel Core chips - that folks are starting to use the term "core" to refer to processors rather than memory. E.g. webopedia entry. Michael Daly 21:00, 14 January 2007 (UTC)

[edit] Curie point

The temerpatures quoted in the article seem to be waayyyy too low to me. My understanding was that the core was heated up to close to the Curie temperature, which I thought was 450 degree Kelvin (!) (or something like that) for ferrite cores. That would be around 300 or 400 degrees farenheit. The point of getting the core so hot was in order to minimize the switching time: the magentism of the cores could be flipped much much faster, if it was held close to, but just below, the Curie point. Yes, this means that you'd have an oven in the air-conditioned glass room. But I remember working with these things: two full-size boxes (five feet high, 3 feet wide), with 16KBytes in each box, and these had burnt-looking metal and asbestos poking out everywhere if you opened the front sheet-metal door. Surely my memory is not that bad...

In general, I think the article needs a section on switching speed and the Curie point. Unfortunately, I am not qualified to add this. linas 03:06, 27 November 2005 (UTC)

Core memory was NOT operated at anywhere near the Curie temperature. The switching time is relatively independent of temperature, though the required current is not. For a technical description of the operation of a typical late 1960s/early 1970s core memory subsystem, see DEC MM11-E Core Memory Manual (PDF).
The earliest core memory systems were not temperature compensated, so they were heated, but to temperatures well below 100C. The reason for heating was only to maintain a constant temperature such that a fixed drive current could be used. --Brouhaha 09:45, 12 November 2006 (UTC)
That sounds right. I remember our IBM 1620 (early 1960s vintage machine) having to warm up its core memory as part of power-up. Paul Koning (talk) 21:12, 9 April 2008 (UTC)

[edit] Other Forms of Core Memory

This paragraph makes no sense to me:

Another form of core memory called core rope memory provided read-only storage. In this case, the cores were simply used as transformers; no information was actually stored magnetically within the core.

How does it work and why is it called memory if no information is stored? Landroo 02:56, 13 April 2007 (UTC)

See the article on core rope memory; the information was stored by weaving the various "word lines" inside the core (for example, for a "1") or outside the core (for a "0"). So the information was stored by the person who originally wove the word lines (assembled the memory system), but wasn't stored in the various "bit cores" per se.
Atlant 13:17, 13 April 2007 (UTC)

[edit] Writing to Core Memory

Could someone with the knowledge please explain the following section:

Writing is similar in concept, but always consists of a "flip to 1" operation, relying on the memory already having been set to the 0 state in a previous read. If the core in question is to hold a 1, then the operation proceeds normally and the core flips to 1. However if the core is to instead hold a zero, a small amount of current is sent into the Inhibit line, enough to drop the combined field from the X, Y and Inhibit lines below the amount needed to make the flip. This leaves the core in the 0 state.

Is this section talking about normal writing or the "write-after-read cycle"? If it is normal writing, I makes no sense to me why you would just flip to 0 or 1. If it is the "write-after-read cycle" it makes much more sense, but I don't think that is clear from the text.

Bajsejohannes 18:45, 24 July 2007 (UTC)

There is no "normal writing" as you refer to it. Core memory always operated on a "read/write cycle", where the write always followed a read - therefore the word was all 0 state when the write phase of the cycle began. If the data read was not needed, it was simply ignored. -- 205.175.225.22 (talk) 00:07, 30 January 2008 (UTC)

[edit] Use of Ferrite Core Memory

[edit] Speed

The memory speeds given in the article don't match the state of the art. In 1964, CDC (in the 6600) has 1 microsecond cycle time core memory. Paul Koning (talk) 01:13, 24 March 2008 (UTC)

Some other parameters differ, too. Read/write current in that memory was 200 mA. Paul Koning (talk) 14:31, 10 April 2008 (UTC)

[edit] Shaking the core to bits (or shaking the bits in the core)

Alas, the reference I have for this piece of information is not on the web - it's in the private papers of Richard Brent (scientist), who is the person who wrote the program that was able to make the core frame rattle in waves, causing it to destruct. The next time I'm there, I'll find the exact date for the reference, but it was during his doctoral research in Stanford in the late 1960s.

Would that be suitable reference, and not regarded as an "Urban Legend"? If so (I'll give it a week) I'll restore the line under "trivia".

Reynardo (talk) 15:02, 9 April 2008 (UTC)

It's not a very accessible reference, is it? Don't know what other Wikipedia editors think but I'd find this one hard to accept. Look at the Wikipedia policies on reliable sources and see if this would qualify. I don't know a whole lot about core memory and so I don't understand how it would work. There should be darn close to zero leakage flux between the cores. And the currents in the wires are only a couple of amperes, so how much force could there be between the wires? The wires don't run parallel with each other for great distances - you want to avoid that for cross-talk reasons. Trivia sections are discouraged, anyway. Was there ever an engineering bulletin or advisory put out to users not to do this? The more I think about it, the more dubious it sounds. --Wtshymanski (talk) 17:55, 9 April 2008 (UTC)
I don't buy it either, not without a published reference from a reliable source.
I was familiar with the PDP-1, the TX-0, and the LINC, all of which date from the early days of core memory. There were no audible sounds coming from the core memory. At least the first two were in hacker environments where any such characteristics would have been noted and exploited for their amusement value.
Programs to play crude tunes on almost every computer in almost every conceivable manner (chain printers... of course, the built-in speaker on the LINC... the "harmony compiler" on the PDP-1) existed. If core memory could be made to vibrate physically, it's just not conceivable that this wouldn't have been widely known.
I concur with Wtshymanski seat-of-the-pants judgments about the sizes of the currents and the forces involved.
Some branch of the military made heavy use of "magamps" and magnetic-cored-based computing elements in the days before transistors were available, and generally speaking I thought of core memory as being rugged, not fragile.
I heard (but never witnessed) of a hack that made core memory in an IBM mainframe... probably a 709 or 7090... generate RFI that produced harsh but recognizable tunes if a transistor radio was placed nearby. I find this believable. Perhaps the urban legend is derived from this. Dpbsmith (talk) 20:21, 9 April 2008 (UTC)


From how it was explained to me (as this is not my area of expertise) the core memory is written by flipping the ring on the pair of wires from one side (0) to the other (1). The program worked by having the rings flip in physical sequences, so that the flip moved like a well-synchronised Mexican wave, causing waves of movement across the frame. By having the waves timed to cause peaks and troughs in the right frequency, the frame would start to shake. It wasn't current leakage, nor was it to do with localised music - it was wholly and solely a physical co-ordination of the rings.
I appreciate that the source is not highly accessible, but I'll check with Dr R. Brent next week about what form the notes take. It may well turn out to be primary level laboratory notes, which ought to be allowed. As to it being trivia, that's a difficult one to judge. Where does one draw the line between information that might be of use, and trivia? Reynardo (talk) 16:58, 12 April 2008 (UTC)
You say: "from how it was explained to me (as this is not my area of expertise) the core memory is written by flipping the ring on the pair of wires from one side (0) to the other (1)."
This is not how core memory works. There is no physical or mechanical motion of the cores. All that changes is the direction of magnetization inside the core. It is purely electronic, and there are no moving parts. Dpbsmith (talk) 22:56, 12 April 2008 (UTC)
*sigh* Then I shall pin this source down and BEAT HIM for spinning me along on it. Reynardo (talk) 06:07, 13 April 2008 (UTC)