Interrupt request
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In computing, an interrupt request (or IRQ) is a phrase used to refer to either the act of interrupting the bus lines used to signal an interrupt, or the interrupt input lines on a Programmable Interrupt Controller (PIC). Interrupt lines are often identified by an index with the format of IRQ followed by a number. For example, on the Intel 8259 family of PICs there are eight interrupt inputs commonly referred to as IRQ0 through IRQ7. In x86 based computer systems that use two of these PICs, the combined set of lines are referred to as IRQ0 through IRQ15. Technically these lines are named IR0 through IR7, and the lines on the ISA bus to which they were historically attached are named IRQ0 through IRQ15.
Newer x86 systems integrate an Advanced Programmable Interrupt Controller (APIC) that conforms to the Intel APIC Architecture. These APICs support a programming interface for up to 255 physical hardware IRQ lines per APIC, with a typical system implementing support for only around 24 total hardware lines.
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[edit] Overview
When working with computer hardware, installing and removing devices, the system relies on interrupt requests. There are default settings that are configured in the system BIOS and recognized by the operating system. These default settings can be altered by advanced users. Modern Plug-and-play technology has not only reduced the need for concern for these settings, but has virtually eliminated manual configuration.
[edit] x86 IRQs
See Intel 8259 for a common list and discussion of hardware IRQ lines in x86 systems.
Typically, 16 IRQs are used. IRQs 0 to 7 are managed by one Intel 8259 PIC, and IRQs 8 to 15 by a second Intel 8259 PIC. The first PIC, the master, is the only one that directly signals the CPU. The second PIC, the slave, instead signals to the master on its IRQ 2 line, and the master passes the signal on to the CPU. There are therefore only 15 interrupt request lines available for hardware. The easiest way of viewing this information on Microsoft Windows is to use Device Manager or System Information (msinfo32.exe). On Linux, you can run "cat /proc/interrupts" or "procinfo".
[edit] Master PIC
- IRQ 0 - System timer. Reserved for the system. Cannot be changed by a user.
- IRQ 1 - Keyboard. Reserved for the system. Cannot be altered even if no keyboard is present or needed.
- IRQ 2 - Cascaded signals from IRQs 8-15. A device configured to use IRQ 2 will actually be using IRQ 9
- IRQ 3 - COM2 (Default) and COM4 (User) serial ports
- IRQ 4 - COM1 (Default) and COM3 (User) serial ports
- IRQ 5 - LPT2 Parallel Port 2 or sound card
- IRQ 6 - Floppy disk controller
- IRQ 7 - LPT1 Parallel Port 1 or sound card (8-bit Sound Blaster and compatibles)
[edit] Slave PIC
- IRQ 8 - Real-time clock (RTC)
- IRQ 9 - Free / Open interrupt / Available / SCSI. Any devices configured to use IRQ 2 will actually be using IRQ 9.
- IRQ 10 - Free / Open interrupt / Available / SCSI
- IRQ 11 - Free / Open interrupt / Available / SCSI
- IRQ 12 - PS/2 connector Mouse. If no PS/2 connector mouse is used, this can be used for other peripherals
- IRQ 13 - ISA / Math co-processor
- IRQ 14 - Primary IDE. If no Primary IDE this can be changed
- IRQ 15 - Secondary IDE
[edit] More Information
More information on the Intel 8259 PIC and its IRQ lines can be found in the IA-32 Intel Architecture Software Developer’s Manual, Volume 3A: System Programming Guide, Part 1, freely available on the Intel website.
[edit] See also
- Advanced Programmable Interrupt Controller
- Programmable Interrupt Controller
- Intel 8259
- Interrupt handler
- Input/Output Base Address
- Plug-And-Play
[edit] References
- Gilluwe, Frank van. The Undocumented PC, Second Edition, Addison-Wesley Developers Press, 1997. ISBN 0-201-47950-8
- Shanley, Tom. ISA System Architecture, Third Edition, Addison-Wesley Publishing Company, 1995. ISBN 0-201-40996-8
- Solari, Edward. PCI & PCI-X Hardware and Software Architecture & Design, Sixth Edition, Research Tech Inc., 2004. ISBN 0-9760865-0-6