Image:FAST HiLevel PT.jpg
From Wikipedia, the free encyclopedia
Size of this preview: 800 × 309 pixels
Full resolution (1,954 × 754 pixels, file size: 111 KB, MIME type: image/jpeg)
John D. Davis. "FAST Processor Tile"
Image from Ph.D. dissertation: "FAST: A FLEXIBLE ARCHITECTURE FOR SIMULATION AND TESTING OF MULTIPROCESSOR AND CMP SYSTEMS"
This diagram was created by the FAST group as part of an academic project using public funds, and therefore should be considered a public domain image.
[edit] Copyright
Copyright © 2007 FAST-2007
This original image are free – provided only that you include a brief acknowledgement along the lines of "John D. Davis. 'FAST Processor Tile'Image from FAST Ph.D. Dissertation Davis-2007"
You are free:
- to copy, distribute, display, and perform the work
- to make commercial use of the work
Under the following conditions:
- Attribution. You must give the original author credit.
This work is licensed under the Creative Commons Attribution-ShareAlike 2.5 License. Attribution: John D. Davis |
File history
Click on a date/time to view the file as it appeared at that time.
Date/Time | Dimensions | User | Comment | |
---|---|---|---|---|
current | 01:33, 26 January 2007 | 1,954×754 (111 KB) | Su johnd (Talk | contribs) | (John D. Davis. "FAST Processor Tile" <BR><BR> Image from Ph.D. dissertation: "FAST: A FLEXIBLE ARCHITECTURE FOR SIMULATION AND TESTING OF MULTIPROCESSOR AND CMP SYSTEMS" <BR><BR> ==Copyright== '''Copyright © 2007 FAST-2007''' <BR><BR> This original) |
- Search for duplicate files
- Edit this file using an external application
See the setup instructions for more information.
File links
The following pages on the English Wikipedia link to this file (pages on other projects are not listed):