Emotion Engine

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Sony Emotion Engine CPU
Sony Emotion Engine CPU

The Emotion Engine is a CPU developed and manufactured by Sony and Toshiba for use in the Sony PlayStation 2. It consists of a MIPS based core, two Vector Processing Units (VPU), a graphics interface (GIF), a 10 channel DMA unit, a memory controller, an Image Processing Unit (IPU) and an input output interface.

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[edit] Description

At the heart of the Emotion Engine is a two way superscalar in order MIPS-based core primarily based on the MIPS III ISA but includes some instructions defined by the MIPS IV ISA. The MIPS-based core consists of two 64 bit fixed point units and a single precision (32 bit) floating point unit. The ALU and the FPU pipelines are both six stages long. To feed the execution units with instructions and data, there is a 16 KB two-way set associative instruction cache, an 8 KB two-way set associative non blocking data cache and a 16 KB scratchpad RAM. Both the instruction and data caches are virtually indexed and physically tagged while the scratchpad RAM exists in a separate memory space. A combined 48 double entry instruction and data translation lookaside buffer is provided for translating virtual addresses. Branch prediction is achieved by a 64 entry branch target address cache and a branch history table that is integrated into the instruction cache. The branch mispredict penalty is three cycles due to the short six stage pipeline.

The two VPUs (VPU0 and VPU1) provide the majority of the Emotion Engine's floating point performance. Each VPU features thirty two 128 bit registers, sixteen 16 bit fixed point registers, four FMAC units, an FDIV unit and a local data memory. The data memory for VPU0 is 4 KB in size while VPU1 features a 16 KB data memory. To achieve high bandwidth, the VPU's data memory is connected directly to the GIF, and both of the data memories can be read directly by the DMA unit. A single vector instruction consists of four 32 bit IEEE compliant single precision floating point values which are distributed to the four single precision (32 bit) FMAC units for processing. Contrary to popular belief, the Emotion Engine is not a 128-bit processor as it does not process a 128-bit value, only a bunch of four 32 bit values that fit into one 128 bit register. This scheme is similar to the SSEx extensions by Intel. The FMAC units have an instruction latency of four cycles, but as they have a six stage pipeline, they have a throughput of one cycle per an instruction. The FDIV unit has a nine stage pipeline and can execute one instruction every seven cycles.

Communications between the MIPS core, the two VPUs, GIF, memory controller and other units is handled by a 128 bit wide internal data bus running at half the clock frequency of the CPU. At 300 MHz, the internal data bus provides a maximum theoretical bandwidth of 2.4 GiB/s. DMA transfers over this bus occurs in packets of eight 128 bit words, achieving a peak bandwidth of 2 GiB/s. The Emotion Engine interfaces directly to the Graphics Synthesizer via the GIF and a dedicated 64 bit wide, 150 MHz bus with a maximum theoretical bandwidth of 1.2 GiB/s.

Communication between the Emotion Engine and RAM occurs through two channels of DRDRAM and the memory controller, which interfaces to the internal data bus. The two channels of DRDRAM have a maximum theoretical bandwidth of 3.2 GiB/s, about 33% more bandwidth than the internal data bus. Because of this, the memory controller buffers data sent from the DRDRAM channels so the extra bandwidth can be utilised by the CPU.

To provide communications between the Emotion Engine and the Input Output Processor (IOP), the input output interface interfaces a 32 bit wide, 37.5 MHz input output bus with a maximum theoretical bandwidth of 150 MB/s to the internal data bus. It should be noted that this interface provides vastly more bandwidth than what is required by the PlayStation's input output devices.

The first versions of the PlayStation 3 featured an Emotion Engine on its motherboard to achieve backwards compatibility with Playstation and PlayStation 2 titles. However, subsequent releases of the Playstation 3, including the initial PAL release, dropped the Emotion Engine to lower costs. Instead, software emulation is used to allow backwards compatibility.

[edit] Specifications

[edit] Theoretical performance

[edit] References

  • Sony's Emotionally Charged Chip. Keith Diefendorff. The Microprocessor Report, Volume 13, Number 5. 19 April, 1999.

[edit] See also

[edit] External links