Emitter-coupled logic
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In electronics, emitter-coupled logic, or ECL, is a logic family in which current is steered through bipolar transistors to implement logic functions. ECL is sometimes called current-mode logic[2] or current-switch emitter-follower (CSEF) logic.[3][4]
The chief characteristic of ECL is that the transistors are never in the saturation region and can thus change states at very high speed. Its major disadvantage is that the circuit continuously draws current, which means it requires a lot of power.
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[edit] History
ECL was invented in August 1956 at IBM by Hannon S. Yourke[6]. Originally called current steering logic, it was used in the Stretch, IBM 7090, and IBM 7094 computers.[5]
While ECL circuits in the mid-1960s through the 1990s consisted of a differential amplifier input stage to perform logic, followed by an emitter follower to drive outputs and shift the output voltages so they will be compatible with the inputs, Yourke's current switch, also known as ECL, consisted only of differential amplifiers. To provide compatible input and output levels, two complementary versions were used, an NPN version and a PNP version. The NPN output could drive PNP inputs, and vice-versa. "The disadvantages are that more different power supply voltages are needed, and both pnp and npn transistors are required."[5]
Motorola introduced their first digital monolithic integrated circuit line, MECL I, in 1962.[7]
[edit] Explanation
TTL and related families use transistors as digital switches where transistors are either cut off or saturated, depending on the state of the circuit. ECL gates use differential amplifier configurations at the input stage. A bias configuration supplies a constant voltage at the midrange of the low and high logic levels to the differential amplifier, so that the appropriate logical function of the input voltages will control the amplifier and the base of the output transistor (this output transistor is used in common collector configuration). The propagation time for this arrangement can be less than a nanosecond, making it for many years the fastest logic family.
[edit] Characteristics
Other noteworthy characteristics of the ECL family include the fact that the large current requirement is approximately constant, and does not depend significantly on the state of the circuit. This means that ECL circuits generate relatively little power noise, unlike many other logic types which typically draw far more current when switching than quiescent, for which power noise can become problematic. In an ALU - where a lot of switching occurs - ECL can draw lower mean current than CMOS.
[edit] Power supplies and logic levels
The ECL circuits available on the open market usually operated with negative power supplies (-5.2 volts), and logic levels incompatible with other families. This meant that interoperation between ECL and other logic families, such as the popular TTL family, required additional interface circuits. The fact that the high and low logic levels are relatively close meant that ECL suffers from small noise margins, which can be troublesome.
At least one manufacturer, IBM, made ECL circuits for use in the manufacturer's own products; the power supplies were substantially different from those used in the open market.[8]
[edit] Usage
The drawbacks associated with ECL have meant that it has been used mainly when high performance is a vital requirement. Other families (particularly advanced CMOS variants) have replaced ECL in many applications, even mainframe computers. However, some experts predict increasing use of ECL in the future, particularly in conjunction with more widespread adoption of advanced semiconductors such as gallium arsenide, which has always been seen as the semiconductor of the future, but cannot be produced as cheaply or cleanly as silicon and is toxic.
Older high-end mainframe computers, such as the Enterprise System/9000 members of IBM's ESA/390 computer family, used ECL;[8] current IBM mainframes use CMOS.
The equivalent of emitter-coupled logic made out of FETs is called source-coupled FET logic (SCFL).
[edit] References
- ^ Original drawing based on William R. Blood Jr. (1972). MECL System Design Handbook 2nd ed. n.p.: Motorola Semiconductor Products Inc. 1.
- ^ Donald D. Givone (2003). Digital Principles and Design. McGraw–Hill. ISBN 0072551321.
- ^ Yuan Taur and Tak H. Ning (1998). Fundamentals of Modern VLSI Devices. World Scientific.
- ^ US patents 4709169, 4490630, 4112314.
- ^ a b c E. J. Rymaszewski et al. (1981). "Semiconductor Logic Technology in IBM". IBM Journal of Research and Development 25 (5): 607-608. ISSN 0018-8646.
- ^ EARLY TRANSISTOR HISTORY AT IBM
- ^ William R. Blood Jr. (1972). MECL System Design Handbook 2nd ed. n.p.: Motorola Semiconductor Products Inc. vi.
- ^ a b A. E. Barish et al. (1992). "Improved performance of IBM Enterprise System/9000 bipolar logic chips". IBM J. of Research and Development 36 (5): 829–834.
[edit] See also
- Resistor–transistor logic (RTL)
- Diode–transistor logic (DTL)
- Transistor–transistor logic (TTL)
- Complementary metal–oxide–semiconductor (CMOS)
- Positive emitter-coupled logic (PECL)
- Low-voltage positive emitter-coupled logic (LVPECL)
- Integrated injection logic (I2L)