Talk:Dual in-line package

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This article contains material from the Federal Standard 1037C, which, as a work of the United States Government, is in the public domain.

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[edit] Merge suggestion

Dual in-line package and Dual-Inline Package should be merged. --Anonymous

Agree. BTW it's generally good to sign and date posts to talk pages. There's been some discussion on the village pump as to the proper name for the merged article. Andrewa 03:57, 27 Oct 2004 (UTC)
I took the chance of establishing the present article as the merged one. My sources indicate that this title is the correct and most used one. I guess potentially disagreeing contributors will let themselves be heard. --Wernher 18:49, 27 Oct 2004 (UTC)
Agree, see Wikipedia:Village pump (miscellaneous)#DIP(link fixed by plugwash). Andrewa 01:10, 28 Oct 2004 (UTC)


[edit] Highest pin count for a dual in line packaging

May I know what is the highest pin count a dual in line package can go now?

The largest common size is 40 pin but bigger sizes have been used by some chips in the past (for example the megadrive CPU). I don't know exactly how big the largest one ever produced was though.

[edit] comparison with bga is stupid

its like comparing e-mail with morse code! Plugwash 09:38, 2 April 2006 (UTC)

[edit] PDIP pitch

don't PDips have 0.05" spacing?::

Jkoether 10-13-06

All the dips i've ever seen (whether plastic or ceramic) had a .1 inch spacing between two pins in the same row. Most have a .3 or .6 inch spacing between the rows but I have seen other widths particularlly with sensor chips. SOIC (the surface mount package which took over from dip) has a 0.05 inch spacing. Plugwash (talk) 01:33, 17 May 2008 (UTC)

[edit] Better references?

The intel reference given by ISBN *may* be the same as http://www.intel.com/design/packtech/packbook.htm , but I'm reticent to add it to the references section, since I have no indication that anything in the article was written based on it. In purticular, several sections of chapter 2 give you various sorts of DIP (sadly, only in certian pin-counts, they don't give a general formula for the parameters, nor does it give the size I'm looking for).


[edit] Chip and Component catalogue

I think there needs to be a chip connection categorisation system on Wikipedia, maybe to be expanded to other components. So lets say I was looking for Dips, I should be able to go to chip_packaging (or some such name) an then it'll have a list. Split the list up by things like: Surface mount, solder in, square, rectangular, PGA, BGA ....

What do you think?

--Stripy42 (talk) 15:58, 15 January 2008 (UTC)

Absolutely! Although actually, I came here while trying to find something on S08... no index for footprints either. —Preceding unsigned comment added by 150.101.166.15 (talk) 06:03, 15 May 2008 (UTC)

SO8 probablly means 8 pin SOIC Plugwash (talk) 02:01, 17 May 2008 (UTC)

[edit] dual in line pin = dip

Bemused to see that the common understanding from the 70s and 80s, when these packages where common, doesn't even rate a mention. A DIPP was a Dual Inline Pin Package. A DIP-8 package was a Dual Inline Pin package with 8 pins. Not that I have a web page from the '70s to refer to, but it's interesting to see history slip away like that.150.101.166.15 (talk) 06:41, 15 May 2008 (UTC)